Universal Serial Bus (USB)
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
12-4
Freescale Semiconductor
However, to reduce power consumption, USB_VDD may be left unconnected if either of the following is
true:
The USB module is not used.
An external transceiver is used.
12.2.1.2
Clock Generator
The USB module requires two clock inputs; the system clock and a 48-MHz data clock. The data clock
source is selectable between the USB_ExtCLK pin or the system clock. The clock generator automatically
uses the external clock as the data clock if it detects the presence of a clock signal on the USB_CLK pin
during system reset. This automatic selection can be overridden by setting bit USBEPCTL0[CLK_SEL],
. If a clock signal is not present on USB_CLK, the clock generator uses the system clock.
NOTE
In all cases, the system clock must be at least 24-MHz for the USB module
to function properly. If the system clock is used for the USB data clock, the
system clock frequency must be 48-MHz.
12.2.1.3
USB Control Logic
The control logic performs the following functions:
For transmitted data:
— Packet creation
— Parallel-to-serial conversion
— CRC generation
— NRZI encoding
— Bit stuffing
For received data:
— Sync detection
— Packet identification
— End-of-packet detection
— Serial-to-parallel conversion
— CRC validation
— NRZI decoding
— Bit unstuffing
For error detection:
— Bad CRC
— Timeout waiting for end-of-packet
— Bit stuffing violations