Pulse-Width Modulation (PWM) Module
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
18-2
Freescale Semiconductor
Summary of the main features include:
Double-buffered width register
Variable-divide prescale
Three independent PWM modules
Byte-wide width register provides programmable duty cycle control
18.2
PWM Operation
The PWM is a simple free-running counter combined with a pulse-width register and a comparator such
that the output is cleared whenever the counter value exceeds the width register value. When the counter
overflows, or “wraps around,” its value becomes less than or equal to the value of the width register, and
the output is set. With a suitable low-pass filter, the PWM can be used as a digital-to-analog converter.
The width register is double-buffered so that a new value can be loaded for the next cycle without affecting
the current cycle. At the beginning of each period, the value of the width buffer register is loaded into the
width register, which feeds the comparator. This value is used for comparison during the next cycle. The
prescaler contains a variable divider that can reduce the incoming clock frequency by certain values
between 1 and 32768.
18.3
PWM Programming Model
This section describes the registers and control bits in the PWM module. There are three independent
PWM modules, each with its own control and width registers. The memory map for the PWM is shown in
Table 18-1. PWM Module Memory Map
MBAR
Offset
[31:24]
[23:16]
[15:8]
[7:0]
0x00C0
PWM Control Register 0
(PWCR0)
Reserved
0x00C4
PWM Control Register 1
(PWCR1)
Reserved
0x00C8
PWM Control Register 2
(PWCR2)
Reserved
0x00D0
PWM Pulse-Width Register 0
Reserved
0x00D4
PWM Pulse-Width Register 1
Reserved
0x00D8
PWM Pulse-Width Register 2
Reserved