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MOTOROLA
MPC801 USER’S MANUAL
5-1
5
SECTION 5
CLOCKS AND POWER CONTROL
The PowerQUICC has an on-chip oscillator, clock synthesizer, and low-power divider that
gives you a comprehensive set of choices for generating system clocks. They provide you
with many opportunities to save power and system cost without forcing you to sacrifice
flexibility or control. The main timing reference for the MPC801 can be a high frequency
crystal of 4MHz, a low frequency crystal of 32KHz, or an external frequency source at 4MHz
or the system frequency. The on-chip phase-locked loop (PLL) can multiply the output of the
crystal circuit up to the final system frequency. A crystal circuit consists of a parallel resonant
crystal, two capacitors, and two resistors. Notice that the values shown as example values
are based on inhouse designs and your circuit might require slightly different values to
operate properly. Crystals are typically much cheaper than similar speed oscillators, but
they may not be as stable since they are affected by parameters like trace length,
component quality, board layout, and MPC801 shrink level. For the most part, they are
usually stable, but it is impossible to guarantee that they will remain that way because the
MPC801 process may change or the external component may shift.
NOTE
The internal frequency of the MPC801 and the output of the
CLKO pins is dependent on the quality of the crystal
circuit and the multiplication factor used in the PLLCR.
The system operating frequency is generated through a programmable phase-locked loop
called the system PLL (SPLL). The SPLL is programmable in integer multiples of input
oscillator frequency to generate the internal operating frequency that should be at least
15MHz. It can be divided by a power of two to generate the system operating frequencies.
Another responsibility of the MPC801 and part of the clock section are the clocks to the
timebase, decrementer, real-time clock, and periodic interrupt counter. The oscillator,
timebase, decrementer, real-time clock, and periodic interrupt counter are all powered by
the keep alive power supply (KAPWR) that allows the counters to continue counting at
32KHz/4MHz, even when the main power to the MPC801 is off. While the power is off, the
periodic interrupt timer can be used to notify the integrated circuit power supply that power
should be sent to the system at specific intervals. This is the power-down wake-up feature.
When the core is not in power-down low-power mode, the keep alive power (KAPWR) is
powered to the same voltage value as that of the I/O buffers and logic. Therefore, if the
internal power supply is 2V and the I/O buffers and logic voltage are 3.3V, the KAPWR is
(2.9
÷
3.3)V. For more details refer to
Section 5.1 The Clock Module
Configuration
. Figure 5-1 illustrates the clock unit’s functional block diagram.
and
Section 5.10.1