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Memory Management Unit
11-10
MPC801 USER’S MANUAL
MOTOROLA
11
11.6 MEMORY MANAGEMENT UNIT PROGRAMMING MODEL
All memory management unit special registers can be accessed by the PowerPC
mfspr
instructions. In addition, the PowerPC
supported. Memory management unit registers should be accessed when both MSR
IR
and MSR
DR
=0. No similar restriction exists for the
mtspr
/
tlbie
and
tlbia
architecture instructions are
=0
tlbie
and
tlbia
instructions.
11.6.1 Configuration Registers
11.6.1.1 INSTRUCTION MMU CONTROL REGISTER
GPM—Group Protection Mode
0 = PowerPC mode.
1 = Domain manager mode.
For Data Pages
Privileged
No Access
Read/Write
Read/Write
Read/Write
Problem
No Access
No Access
Read-Only
Read/Write
00 –
01 –
10 –
11 –
MD_CTR(PPCS) = 0
0 – Subpage Is Not Valid
1 – Subpage Is Valid
MD_CTR(PCCS) = 1
1000 – Hit Only For
Privileged Accesses
0100 – Hit Only For
Problem Accesses
1100 – Hit For Both
If The Page Size Is
Larger Than 4K. Then
All Four Bits Should
Have The Same Value.
28
SPS
Small Page
Size
Should be 0
0 – 4K
1 – 16K
29
SH
Shared Page
0 – This Entry Marches Only If The ASID Filed In The TLB Entry Matches The Value Of The
M_CASID Register.
1 – ASID Comparison Is Disabled For The Entry.
30
CI
Cache Inhibit
Cache-Inhibit Attribute For The Entry.
31
V
Valid Bit
Page Valid Bit
MI_CTR
BIT
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
FIELD
GPM
PPM
CIDEF
RES
RSVI
RES
PPCS
RESERVED
RESET
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BIT
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
FIELD
RESERVED
ITLB_INDX
RESERVED
RESET
0
0
0
R/W
R/W
R/W
R/W
Table 11-5. Level Two (Page) Descriptor Format (Continued)
BITS
MNEMONIC
DESCRIPTION
4K PAGES WITH 1K
RESOLUTION PROTECTION
4K RESOLUTION PROTECTION AND
PAGES LARGER THAN 4K