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Memory Controller
MOTOROLA
MPC801 USER’S MANUAL
15-19
15
15.2.3 User-Programmable Machines
The user-programmable machine (UPM) is a flexible interface that connects to a wide range
of memory devices. At the heart of the user-programmable machine is an internal memory
RAM that specifies what the logical value driven on the external memory controller pins are
for a given clock cycle. Each word in the RAM provides bits that allow a memory access to
be controlled with a resolution of one quarter the system clock period on byte- and chip-
select lines. There are three possible ways to initiate a UPM cycle:
When an internal or external master requests an external memory access.
When an internal periodic timer expires, thus requesting a transaction.
When a valid command is written to the memory command register.
Figure 15-20 illustrates basic user-programmable machine operation.
Figure 15-20. General Description of a UPM
When a new access to external memory is requested by any of the internal masters, the
address of the transfer and the address type is compared to each one of the valid banks
defined in the memory controller. When an address match is found in one of the memory
banks, the MS
bits of its base register selects the user-programmable machine that will
handle the memory access. A service request from the selected user-programmable
machine is required for this access.
EXTERNAL SIGNALS
TIMING GENERATOR
INTERNAL
SIGNALS
LATCH
ARRAY
GENERATOR
EXTERNAL MEMORY ACCESS
REQUEST
INTERNAL PERIODIC TIMER
REQUEST
SOFTWARE REQUEST
RAM
ARRAY
INCREMENT
POINTER
(LAST = 0)
WAIT
REQUEST
LOGIC
WAEN
HOLD
REQUEST
WAIT
POINTER