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Serial Communication Modules
MOTOROLA
MPC801 USER’S MANUAL
16-31
16
16.3.3.4.2 I
2
C Address Register.
The 8-bit, memory-mapped, read/write I
2
C address
(I2ADD) register holds the address for this I
2
C port.
SAD
—
Slave Address
This field holds the slave address for the I
2
C port.
Bit 7—Reserved
This bit is reserved and should be set to 0.
16.3.3.4.3 I
2
C BRG Register.
The 8-bit, memory-mapped, read/write I
2
C BRG (I2BRG)
register sets the divide ratio of the baud rate generator. This register is set to all ones at hard
reset.
DIV
—
Division Ratio
These bits specify the divide ratio of the baud rate generator divider in the I
2
C clock
generator. The output of the prescaler is divided by 2 * ([DIV0–DIV7] + 3 + 2*FLT). The clock
has a 50% duty cycle. The minimum value for each DIV bit is 3 if the digital filter is disabled
and 6 if it is enabled.
16.3.3.4.4 I
2
C Command Register.
The 8-bit read/write I
2
C command (I2COM) register is
used to start an I
2
C operation.
STR—Start Transmit
When the I
2
C is configured as a master, setting this bit to 1 causes the I
2
C controller to start
the transmission of data from the I
2
C transmit buffers if you have configured them as ready.
When the I
2
C is configured as a slave, setting the STR bit to 1 when the I
2
C is idle or
between transfers causes the I
2
C to load the shift register from the I
2
C transmit buffer and
start transmitting when an address byte is received that matches the slave address, with the
R/W bit is set. The STR bit is always read as a zero.
I2ADD
BIT
0
1
2
3
4
5
6
7
FIELD
SAD
RESERVED
I2BRG
BIT
0
1
2
3
4
5
6
7
FIELD
DIV
I2COM
BIT
0
1
2
3
4
5
6
7
FIELD
STR
RESERVED
M/S