Data Sheet
June 2001
DSP16410B Digital Signal Processor
Agere Systems Inc.
Agere Systems—Proprietary
Use pursuant to Company instructions
255
7 Ball Grid Array Information
(continued)
7.2 256-Ball EBGA Package
(continued)
Table 174. 256-Ball EBGA Ball Assignments Sorted Alphabetically by Symbol
(continued)
Symbol
PRDY
PRDYMD
PRWN
RSTN
SCK0
SCK1
SICK0
SICK1
SID0
SID1
SIFS0
SIFS1
SOCK0
SOCK1
SOD0
SOD1
SOFS0
SOFS1
TCK0
TCK1
TDI0
TDI1
TDO0
TDO1
TMS0
TMS1
TRAP
TRST0N
TRST1N
V
DD
1
PBGA Coordinate
V9
W8
W7
K17
P20
T2
M17
V1
P19
R3
M19
U2
N18
R4
P18
P4
N17
U1
H19
N2
J17
M2
F19
R2
H20
N1
K20
H18
N3
Type
O
I
I
I
I
I
I/O
I/O
I
I
I/O
I/O
I/O
I/O
O/Z
O/Z
I/O
I/O
I
I
I
I
O
O
I
I
I/O
I
I
P
Description
PIU Host Ready.
PRDY Mode.
PIU Read/Write (negative assertion).
Device Reset (negative assertion).
External Clock for SIU0 Active Generator.
External Clock for SIU1 Active Generator.
SIU0 Input Clock.
SIU1 Input Clock.
SIU0 Input Data.
SIU1 Input Data.
SIU0 Input Frame Sync.
SIU1 Input Frame Sync.
SIU0 Output Clock.
SIU1 Output Clock.
SIU0 Output Data.
SIU1 Output Data.
SIU0 Output Frame Sync.
SIU1 Output Frame Sync.
JTAG Test Clock for CORE0.
JTAG Test Clock for CORE1.
JTAG Test Data Input for CORE0.
JTAG Test Data Input for CORE1.
JTAG Test Data Output for CORE0.
JTAG Test Data Output for CORE1.
JTAG Test Mode Select for CORE0.
JTAG Test Mode Select for CORE1.
TRAP/Breakpoint Indication.
JTAG TAP Controller Reset for CORE0 (negative assertion).
JTAG TAP Controller Reset for CORE1 (negative assertion).
Power Supply for Internal Circuitry.
B18, C5, C7, C9, C10, D3, D9, D12, D13,
E18, G1, G18, J2, K19, L3, M3, M4, N19,
P3, T3, T17, U8, U9, U12, V11, V12, V14,
V16, W3
J18
A2, A7, A11, A15, A19, B1, B20, D8, D11,
D14, F1, G4, G20, H17, K1, K4, L17, L20,
N4, P1, P17, R20, U7, U10, U13, W1, W20,
Y2, Y6, Y10, Y14, Y19
A1, A5, A6, A12, A13, A16, A20, B2, B19,
C3, C18, E1, E20, F20, H1, J1, M20, N20,
R1, T1, T20, V3, V17, V18, W2, W19, Y1,
Y5, Y8, Y9, Y15, Y16, Y20
J20
B7, B15, C17, D4, D17, F2, G19, K3, P2,
R19, U4, U17, U18, V4, V19, V20, W6,
W14
V
DD
1A
V
DD
2
P
P
Power Supply for PLL Circuitry.
Power Supply for External Circuitry (I/O).
V
SS
G
Ground.
V
SS
1A
NC
G
—
Ground for PLL Circuitry.
Not Connected. Tie externally to ground.