
Data Sheet
June 2001
DSP16410B Digital Signal Processor
Agere Systems Inc.
Agere Systems—Proprietary
Use pursuant to Company instructions
173
4 Hardware Architecture
(continued)
4.16 Serial Interface Unit (SIU)
(continued)
4.16.12 Channel Mode—32 Channels or Less in Two Subframes or Less
(continued)
Subframe and Channel Selection in Channel Mode
Figure 50. Subframe and Channel Selection in Channel Mode
0
SELECT SUBFRAME 6 (
I,O
SFID_E = 3)
ISFVEC_E[15:0] (if ISFIDV_E = 1)
OSFVEC_E[15:0] (if OSFIDV_E = 1)
OSFMSK_E[15:0] (if OSFIDV_E = 1)
ISFVEC_O[15:0] (if ISFIDV_O = 1)
OSFVEC_O[15:0] (if OSFIDV_O = 1)
OSFMSK_O[15:0] (if OSFIDV_O = 1)
BIT
1
BIT
2
BIT
3
BIT
4
BIT
5
BIT
6
BIT
7
BIT
8
BIT
9
BIT
10
BIT
11
BIT
12
BIT
13
BIT
14
BIT
15
BIT
96
CH
97
CH
98
CH
99
CH
100
CH
101
CH
102
CH
103
CH
104
CH
105
CH
106
CH
107
CH
108
CH
109
CH
110
CH
111
CH
64
CH
65
CH
66
CH
67
CH
68
CH
69
CH
70
CH
71
CH
72
CH
73
CH
74
CH
75
CH
76
CH
77
CH
78
CH
79
CH
32
CH
33
CH
34
CH
35
CH
36
CH
37
CH
38
CH
39
CH
40
CH
41
CH
42
CH
43
CH
44
CH
45
CH
46
CH
47
CH
0
CH
1
CH
2
CH
3
CH
4
CH
5
CH
6
CH
7
CH
8
CH
9
CH
10
CH
11
CH
12
CH
13
CH
14
CH
15
CH
SELECT SUBFRAME 0 (
I,O
SFID_E = 0)
SELECT SUBFRAME 4 (
I,O
SFID_E = 2)
SELECT SUBFRAME 2 (
I,O
SFID_E = 1)
0
SELECT SUBFRAME 7 (
I,O
SFID_O = 3)
BIT
1
BIT
2
BIT
3
BIT
4
BIT
5
BIT
6
BIT
7
BIT
8
BIT
9
BIT
10
BIT
11
BIT
12
BIT
13
BIT
14
BIT
15
BIT
112
CH
113
CH
114
CH
115
CH
116
CH
117
CH
118
CH
119
CH
120
CH
121
CH
122
CH
123
CH
124
CH
125
CH
126
CH
127
CH
80
CH
81
CH
82
CH
83
CH
84
CH
85
CH
86
CH
87
CH
88
CH
89
CH
90
CH
91
CH
92
CH
93
CH
94
CH
95
CH
48
CH
49
CH
50
CH
51
CH
52
CH
53
CH
54
CH
55
CH
56
CH
57
CH
58
CH
59
CH
60
CH
61
CH
62
CH
63
CH
16
CH
17
CH
18
CH
19
CH
20
CH
21
CH
22
CH
23
CH
24
CH
25
CH
26
CH
27
CH
28
CH
29
CH
30
CH
31
CH
SELECT SUBFRAME 1 (
I,O
SFID_O = 0)
SELECT SUBFRAME 5 (
I,O
SFID_O = 2)
SELECT SUBFRAME 3 (
I,O
SFID_O = 1)
EVEN SUBFRAMES
ODD SUBFRAMES
ACTIVATE/MASK CHANNEL CONTROL:
ACTIVATE/MASK CHANNEL CONTROL: