Data Sheet
June 2001
DSP16410B Digital Signal Processor
Agere Systems Inc.
Agere Systems—Proprietary
Use pursuant to Company instructions
137
4 Hardware Architecture
(continued)
4.15 Parallel Interface Unit (PIU)
(continued)
4.15.2 Hardware Interface
(continued)
4.15.2.1 Enables and Strobes
The PIU provides a chip select input pin (PCSN) that allows the host to connect to multiple DSP16410B or other
devices. The function of the enable and strobe pins (PODS, PIDS, and PRWN) is based on whether the host type
is Intelor Motorola In order to support both types of hosts, the PIU generates a negative-assertion internal strobe
PSTRN that is a logical combination of PCSN, PODS, and PIDS as follows:
PSTRN = PCSN
|
(PIDS ^ PODS)
The PIU initiates all transactions on the falling edge of PSTRN and completes all transactions on the rising edge of
PSTRN.
Table 80. Enable and Strobe Pins
Pin
Name
PCSN
(input)
Select
Value
0
1
Description
PIU Chip
The host is selecting this device for PIU transfers.
The host is not selecting this device for PIU transfers and the PIU 3-states PD[15:0] and
ignores any activity on PIDS, PODS, and PRWN.
For an Intelhost, PODS functions as an output data strobe and must be connected to the
host active-low read data strobe. The host initiates a read transaction by asserting (low)
both PCSN and PODS. The host concludes a read transaction by deasserting (high)
either PCSN or PODS.
PODS
(input)
PIU Output
Data Strobe
—
For a Motorolahost, PODS functions as a data strobe and must be connected to the host
data strobe. The state of the PIDS pin determines the active level of PODS. If PIDS = 0,
PODS is an active-high data strobe. If PIDS = 1, PODS is an active-low data strobe. The
host initiates a read transaction by asserting both PCSN and PODS. The host concludes
a read transaction by deasserting either PCSN or PODS.
For an Intelhost, PIDS functions as an input data strobe and must be connected to the
host active-low write data strobe. The host initiates a write transaction by asserting (low)
both PCSN and PIDS. The host concludes a write transaction by deasserting (high)
either PCSN or PIDS.
PIDS
(input)
PIU Input Data
Strobe
—
For a Motorolahost, the state of PIDS determines the active level of the host data strobe,
PODS.
The host drives PRWN high during host reads, and low during host writes. PRWN must be
stable for the entire access (while PCSN and the appropriate data strobes are asserted).
PRWN
(input)
PIU
Read/Write
Not Strobe
—
For an Intelhost, PRWN and PIDS are connected to the host active-low write data strobe.
For a Motorolahost, PRWN functions as an active read/write strobe and must be con-
nected to the host RWN output.