參數(shù)資料
型號： Am79C965A
廠商： Advanced Micro Devices, Inc.
英文描述： PCnet?-32 Single-Chip 32-Bit Ethernet Controller
中文描述： PCnet？-32單芯片32位以太網(wǎng)控制器
文件頁數(shù)： 104/228頁
文件大?。?/td> 1681K
代理商： AM79C965A
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104
Am79C965A
Software Access
I/O Resources
PCnet-32 Controller I/O Resource Mapping
The PCnet-32 controller has several I/O resources.
These resources use 32 bytes of I/O space that begin
at the PCnet-32 controller I/O Base Address. The
PCnet-32 controller allows two modes of slave access.
Word I/O mode treats all PCnet-32 controller I/O
Resources as two-byte entities spaced at two-byte ad-
dress intervals. Double Word I/O mode treats all
PCnet-32 controller I/O Resources as four-byte entities
spaced at four-byte address intervals. The selection of
WIO or DWIO mode is accomplished by one of two
ways:
1.
H_RESET function.
2.
The PCnet-32 controller I/O mode setting will
default to WIO after H_RESET (i.e. DWIO = 0).
3.
Automatic determination of DWIO mode due to
double-word I/O write access to offset 10h.
DWIO is automatically programmed as active when the
system attempts a double word write access to offset
10h of the PCnet-32 controller I/O space. Note that this
space corresponds to RDP, regardless of whether
DWIO or WIO mode has been programmed. The power
up H_RESET value of DWIO will be ZERO, and this
value will be maintained until a double word access is
performed to PCnet-32 controller I/O space.
Therefore, if DWIO mode is desired, it is imperative that
the first access to the PCnet-32 controller be a double
word write access to offset 10h.
Alternatively, if DWIO mode is not desired, then it is im-
perative that the software never executes a double
word write access to offset 10h of the PCnet-32
controller I/O space.
Once the DWIO bit has been set to a ONE, only a
H_RESET can reset it to a ZERO.
The DWIO mode setting is unaffected by S_RESET or
the STOP bit.
WIO I/O Resource Map
When the PCnet-32 controller I/O space is mapped as
Word I/O, then the resources that are allotted to the
PCnet-32 controller occur on word boundaries that are
offset from the PCnet-32 controller I/O Base Address
as shown in Table 32.
Table 32. Word I/O Mapping
When PCnet-32 controller I/O space is Word mapped,
all I/O resources fall on word boundaries and all I/O re-
sources are word quantities. However, while in Word I/
O mode, address PROM accesses may also be
accessed as individual bytes on byte addresses.
Attempts to write to any PCnet-32 controller I/O re-
sources (except to offset 10h, RDP) as 32 bit quantities
while in Word I/O mode are illegal and may cause
unexpected reprogramming of the PCnet-32 controller
control registers. Attempts to read from any PCnet-32
controller I/O resources as 32-bit quantities while in
Word I/O mode are illegal and will yield undefined
values.
An attempt to
write
to offset 10H (RDP) as a 32 bit
quantity while in Word I/O mode will cause the
PCnet-32 controller to exit WIO mode and immediately
thereafter, to enter DWIO mode.
Accesses to non-word address boundaries are not
allowed while in WIO mode, with the exception of the
APROM locations. The PCnet-32 controller may or may
not produce an LDEV and a RDY signal in response to
such accesses, but data will be undefined.
Accesses of non-word quantities to any I/O resource
are not allowed while in WIO mode,
with the exception
of byte reads from the APROM locations.
PCnet-32
controller may or may not produce an LDEV and will not
produce a RDY signal in response to such accesses,
but data will be undefined.
The Vendor Specific Word (VSW) is not implemented
by the PCnet-32 controller. This particular I/O address
is reserved for customer use and will not be used by
future AMD Ethernet controller products. If more than
Offset
(Hex)
No. of
Bytes
Register
0
2
Address PROM
2
2
Address PROM
4
2
Address PROM
8
2
Address PROM
A
2
Address PROM
C
2
Address PROM
E
2
Address PROM
10
2
RDP
12
2
RAP (shared by RDP and BDP)
14
2
Reset Register
16
2
BDP
18
2
Vendor Specific Word
1A
2
Reserved
1C
2
Reserved
1E
2
Reserved
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