
6
6-
3
9
P
R
E
L
IM
IN
A
R
Y
C
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U
In
str
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PADDW Packed Add Word with Wrap-Around
MMX Register 2 to MMX Register1
Memory to MMX Register
1
4
0FFD [11 mm1 mm2]
0FFD [mod mm r/m]
MMX reg 1 [word] <---- MMX reg 1 [word] + MMX reg 2 [word]
MMX reg [word] <---- memory [word] + MMX reg [word]
1/1
PAND Bitwise Logical AND
MMX Register 2 to MMX Register1
Memory to MMX Register
1
5
0FDB [11 mm1 mm2]
0FDB [mod mm r/m]
MMX Reg 1 [qword] <--logic AND-- MMX Reg 1 [qword], MMX Reg 2 [qword]
MMX Reg [qword] <--logic AND-- memory[qword], MMX Reg [qword]
1/1
PANDN Bitwise Logical AND NOT
MMX Register 2 to MMX Register1
Memory to MMX Register
1
6
0FDF [11 mm1 mm2]
0FDF [mod mm r/m]
MMX Reg 1 [qword] <--logic AND -- NOT MMX Reg 1 [qword], MMX Reg 2 [qword]
MMX Reg [qword] <--logic AND-- NOT MMX Reg [qword], Memory[qword]
1/1
PCMPEQB Packed Byte Compare for Equality
MMX Register 2 with MMX Register1
Memory with MMX Register
1
8
0F74 [11 mm1 mm2]
0F74 [mod mm r/m]
MMX reg 1 [byte] <--FFh-- if MMX reg 1 [byte] = MMX reg 2 [byte]
MMX reg 1 [byte]<--00h-- if MMX reg 1 [byte] NOT = MMX reg 2 [byte]
MMX reg [byte] <--FFh-- if memory[byte] = MMX reg [byte]
MMX reg [byte] <--00h-- if memory[byte] NOT = MMX reg [byte]
1/1
PCMPEQD Packed Dword Compare for Equality
MMX Register 2 with MMX Register1
Memory with MMX Register
1
9
0F76 [11 mm1 mm2]
0F76 [mod mm r/m]
MMX reg 1 [dword] <--FFFF FFFFh-- if MMX reg 1 [dword] = MMX reg 2 [dword]
MMX reg 1 [dword]<--0000 0000h--if MMX reg 1[dword] NOT = MMX reg 2 [dword]
MMX reg [dword] <--FFFF FFFFh-- if memory[dword] = MMX reg [dword]
MMX reg [dword] <--0000 0000h-- if memory[dword] NOT = MMX reg [dword]
1/1
PCMPEQW Packed Word Compare for Equality
MMX Register 2 with MMX Register1
Memory with MMX Register
2
0
0F75 [11 mm1 mm2]
0F75 [mod mm r/m]
MMX reg 1 [word] <--FFFFh-- if MMX reg 1 [word] = MMX reg 2 [word]
MMX reg 1 [word]<--0000h-- if MMX reg 1 [word] NOT = MMX reg 2 [word]
MMX reg [word] <--FFFFh-- if memory[word] = MMX reg [word]
MMX reg [word] <--0000h-- if memory[word] NOT = MMX reg [word]
1/1
PCMPGTB Pack Compare Greater Than Byte
MMX Register 2 to MMX Register1
Memory with MMX Register
2
1
0F64 [11 mm1 mm2]
0F64 [mod mm r/m]
MMX reg 1 [byte] <--FFh-- if MMX reg 1 [byte] > MMX reg 2 [byte]
MMX reg 1 [byte]<--00h-- if MMX reg 1 [byte] NOT > MMX reg 2 [byte]
MMX reg [byte] <--FFh-- if memory[byte] > MMX reg [byte]
MMX reg [byte] <--00h-- if memory[byte] NOT > MMX reg [byte]
1/1
PCMPGTD Pack Compare Greater Than Dword
MMX Register 2 to MMX Register1
Memory with MMX Register
2
0F66 [11 mm1 mm2]
0F66 [mod mm r/m]
MMX reg 1 [dword] <--FFFF FFFFh-- if MMX reg 1 [dword] > MMX reg 2 [dword]
MMX reg 1 [dword]<--0000 0000h--if MMX reg 1 [dword]NOT > MMX reg 2 [dword]
MMX reg [dword] <--FFFF FFFFh-- if memory[dword] > MMX reg [dword]
MMX reg [dword] <--0000 0000h-- if memory[dword] NOT > MMX reg [dword]
1/1
Table 6-25. M II Processor MMX Instruction Set Clock Count Summar y (Continued)
MMX INSTRUCTIONS
OPCODE
OPERATION
CLOCK
COUNT
LATENCY/
THROUGHPUT