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8
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Table 6-25. M II Processor MMX Instruction Set Clock Count Summary
MMX INSTRUCTIONS
OPCODE
OPERATION
CLOCK
COUNT
LATENCY/
THROUGHPUT
EMMS Empty MMX State
10F77
Tag Word <--- FFFFh (empties the floating point tag word)
1/1
MOVD Move Doubleword
Register to MMX Register
MMX Register to Register
Memory to MMX Register
MMX Register to Memory
2
0F6E [11 mm reg]
0F7E [11 mm reg]
0F6E [mod mm r/m]
0F7E [mod mm r/m]
MMX reg [qword] <--move, zero extend-- reg [dword]
reg [qword] <--move-- MMX reg [low dword]
MMX regr[qword] <--move, zero extend-- memory[dword]
Memory [dword] <--move-- MMX reg [low dword]
1/1
5/1
1/1
MOVQ Move Quardword
MMX Register 2 to MMX Register 1
MMX Register 1 to MMX Register 2
Memory to MMX Register
MMX Register to Memory
3
0F6F [11 mm1 mm2]
0F7F [11 mm1 mm2]
0F6F [mod mm r/m]
0F7F [mod mm r/m]
MMX reg 1 [qword] <--move-- MMX reg 2 [qword]
MMX reg 2 [qword] <--move-- MMX reg 1 [qword]
MMX reg [qword] <--move-- memory[qword]
Memory [qword] <--move-- MMX reg [qword]
1/1
PACKSSDW Pack Dword with Signed Saturation
MMX Register 2 to MMX Register 1
Memory to MMX Register
4
0F6B [11 mm1 mm2]
0F6B [mod mm r/m]
MMX reg 1 [qword] <--packdw, signed sat-- MMX reg 2, MMX reg 1
MMX reg [qword] <--packdw, signed sat-- memory, MMX reg
1/1
PACKSSWB Pack Word with Signed Saturation
MMX Register 2 to MMX Register 1
Memory to MMX Register
5
0F63 [11 mm1 mm2]
0F63 [mod mm r/m]
MMX reg 1 [qword] <--packwb, signed sat-- MMX reg 2, MMX reg 1
MMX reg [qword] <--packwb, signed sat-- memory, MMX reg
1/1
PACKUSWB Pack Word with Unsigned Saturation
MMX Register 2 to MMX Register 1
Memory to MMX Register
6
0F67 [11 mm1 mm2]
0F67 [mod mm r/m]
MMX reg 1 [qword] <--packwb, unsigned sat-- MMX reg 2, MMX reg 1
MMX reg [qword] <--packwb, unsigned sat-- memory, MMX reg
1/1
PADDB Packed Add Byte with Wrap-Around
MMX Register 2 to MMX Register 1
Memory to MMX Register
7
0FFC [11 mm1 mm2]
0FFC [mod mm r/m]
MMX reg 1 [byte] <---- MMX reg 1 [byte] + MMX reg 2 [byte]
MMX reg[byte] <---- memory [byte] + MMX reg [byte]
1/1
PADDD Packed Add Dword with Wrap-Around
MMX Register 2 to MMX Register 1
Memory to MMX Register
8
0FFE [11 mm1 mm2]
0FFE [mod mm r/m]
MMX reg 1 [sign dword] <---- MMX reg 1 [sign dword] + MMX reg 2 [sign dword]
MMX reg [sign dword] <---- memory [sign dword] + MMX reg [sign dword]
1/1
PADDSB Packed Add Signed Byte with Saturation
MMX Register 2 to MMX Register1
Memory to Register
9
0FEC [11 mm1 mm2]
0FEC [mod mm r/m]
MMX reg 1 [sign byte] <--sat-- MMX reg 1 [sign byte] + MMX reg 2 [sign byte]
MMX reg [sign byte] <--sat-- memory [sign byte] + MMX reg [sign byte]
1/1
PADDSW Packed Add Signed Word with Saturation
MMX Register 2 to MMX Register1
Memory to Register
1
0FED [11 mm1 mm2]
0FED [mod mm r/m]
MMX reg 1 [sign word] <--sat-- MMX reg 1 [sign word] + MMX reg 2 [sign word]
MMX reg [sign word] <--sat-- memory [sign word] + MMX reg [sign word]
1/1
PADDUSB Add Unsigned Byte with Saturation
MMX Register 2 to MMX Register1
Memory to Register
1
2
0FDC [11 mm1 mm2]
0FDC [mod mm r/m]
MMX reg 1 [byte] <--sat-- MMX reg 1 [byte] + MMX reg 2 [byte]
MMX reg [byte] <--sat-- memory [byte] + MMX reg [byte]
1/1
PADDUSW Add Unsigned Word with Saturation
MMX Register 2 to MMX Register1
Memory to Register
1
3
0FDD [11 mm1 mm2]
0FDD [mod mm r/m]
MMX reg 1 [word] <--sat-- MMX reg 1 [word] + MMX reg 2 [word]
MMX reg [word] <--sat-- memory [word] + MMX reg [word]
1/1
March 7, 1997 10:11 am --Rev1.0