參數(shù)資料
型號： TSB43AA82A1
廠商： Texas Instruments, Inc.
英文描述： 1394 integrated PHY and link layer controller(1394集成PHY和鏈路層控制器)
中文描述： 1394綜合物理層和鏈路層控制器（1394集成物理層和鏈路層控制器）
文件頁數(shù)： 61/146頁
文件大小： 597K
代理商： TSB43AA82A1
335
3.4.45.3 DTx Header Register 2 at F0h
BITS
ACRONYM
DIR
DESCRIPTION
015
DTx page length
R/O
(Note)
DTX page length. Specifies the current page table value used during current packetization.
1631
DTx page table hi
R/O
(Note)
DTX page table high. Specifies the current page table address used during current packetization.
NOTE: R/W when DTPktz = 0
3.4.45.4 DTx Header Register 3 at F4h
BITS
ACRONYM
DIR
R/O
DESCRIPTION
031
DTx page table lo
DTX page table low. Specifies the current page table addr used during the current packetization.
3.4.46 DRx Read Request Header Registers at E8h, ECh, F0h, and F4h (DhdSel at 90h = 10b)
DhdSel in DMA control at 90h selects the header type. Unless otherwise specified, these registers default to
0000 0000h
and are unaffected by a bus reset.
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
E8h
D
DRxtLabel
D
DRxtCode
DRxPrio
ECh
DRx_destination_ID
DRx_destination_offset_hi
F0h
DRx_destination_offset_lo
F4h
DRx_data_length
DRx_extended_tCode
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
3.4.46.1 DRx Header Register 0 at E8h
This register defaults to 0001 0010h.
BITS
ACRONYM
DIR
DESCRIPTION
013
Reserved
N/A
Reserved
1415
DRxSpd
R/O
DRF transaction speed code. DRxSpd represents the speed code of the read request packet transmitted
from the DRF. Defaults to 1h and is unaffected by a bus reset.
1621
DRxtLabel
R/O
DRF transaction tLabel. DRxtLabel represents the transaction tLabel of the read request packet
transmitted from the DRF.
2223
DRxRt
R/O
DRF transmit retry code. DRxRt represents the transaction retry code of the read request packet
transmitted from the DRF.
2427
DRxtCode
R/O
DRF transmit tCode. DRxtCode represents the transaction tCode of the read request packet transmitted
from the DRF. When DRPktz is enabled, DRxtCode is set to 1h automatically. Defaults to 1h and is
unaffected by a bus reset.
2831
DRxPrio
R/O
DRF transmit priority. DRxPrio represents the transaction priority of the read request packet transmitted
from the DRF.
3.4.46.2 DRx Header Register 1 at ECh
BITS
ACRONYM
DIR
DESCRIPTION
015
DRx_destination_ID
R/O
(Note)
DRF transmit destination ID. DRx_destination_ID represents the destination ID of the request
packet transmitted from the DRF.
1631
DRx_destination_offset_hi
R/O
(Note)
DRF transmit destination offset high. DRx_destination_offset_hi represents the destination
offset high of the request packet transmitted from the DRF.
NOTE: R/W when DTPktz = 0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TSB43AA82AI 制造商:TI 制造商全稱:Texas Instruments 功能描述:1394 Integrated PHY and Link-Layer Controller for SBP-2 Products and DPP Products
TSB43AA82AIPGE 功能描述:1394 接口集成電路 Hi Perf Integr Phy & Link Layer Chip RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray
TSB43AA82AIPGEEP 功能描述:1394 接口集成電路 Mil Enh Int PHY and Link-Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray
TSB43AA82APGE 功能描述:1394 接口集成電路 Hi Perf Integr Phy & Link Layer Chip RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray
TSB43AA82APGEG4 功能描述:1394 接口集成電路 Hi Perf Integr Phy & Link Layer Chip RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray
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