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| 型號(hào)： | TSB43AA82A1 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 1394 integrated PHY and link layer controller(1394集成PHY和鏈路層控制器) |
| 中文描述： | 1394綜合物理層和鏈路層控制器（1394集成物理層和鏈路層控制器） |
| 文件頁(yè)數(shù)： | 129/146頁(yè) |
| 文件大?。?/td> | 597K |
| 代理商： | TSB43AA82A1 |
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117
Table 118. Page-7 (Vendor-Dependent) Register Field Descriptions
FIELD
SIZE
TYPE
DESCRIPTION
NPA
1
R/W
Null-packet actions flag. This bit instructs the PHY to not clear fair and priority requests when a null packet is
received with arbitration acceleration enabled. If 1, then fair and priority requests are cleared only when a
packet of more than 8 bits is received; ACK packets (exactly 8 data bits), null packets (no data bits), and
malformed packets (less than 8 data bits) do not clear fair and priority requests. If 0, then fair and priority
requests are cleared when any non-ACK packet is received, including null packets or malformed packets of
less than 8 bits. This bit is cleared to 0 by a hardware reset and is unaffected by a bus reset.
Link_Speed
2
R/W
Link speed. This field indicates the top speed capability of the attached LLC. Encoding is as follows:
Code
Speed
00
S100
01
S200
10
S400
11
Illegal
This field is replicated in the
sp
field of the self-ID packet to indicate the speed capability of the node
(PHY and LLC in combination). However, this field does not affect the PHY speed capability indicated to
peer PHYs during self-ID; the TSB43AA82A PHY identifies itself as S400 capable to its peers regardless
of the value in this field. This field is set to 10b (S400) by a hardware reset and is unaffected by bus
reset.
11.3 Power-Class Programming
The PWRCLS0-PWRCLS2 pins are programmed to set the default value of the power-class indicated in the
pwr
field
(bits 21–23) of the transmitted self-ID packet. Descriptions of the various power-classes are given in Table 119. The
default power-class value is loaded following a hardware reset, but is overridden by any value subsequently loaded
into the Pwr_Class field in base register 4.
Table 119. Power-Class Descriptions
PWRCLS [0:2]
DESCRIPTION
000
Node does not need power and does not repeat power.
001
Node is self-powered and provides a minimum of 15 W to the bus.
010
Node is self-powered and provides a minimum of 30 W to the bus.
011
Node is self-powered and provides a minimum of 45 W to the bus.
100
Node may be powered from the bus for the PHY only using up to 3W and may also provide power to the bus. The amount of bus
power that it provides can be found in the configuration ROM.
101
Node is powered from the bus and uses up to 3 W. An additional 2W is needed to enable the link and higher layers of the node.
110
Node is powered from the bus and uses up to 3 W. An additional 3W is needed to enable the link.
111
Node is powered from the bus and uses up to 3 W. An additional 7W is needed to enable the link.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSB43AA82AI | 制造商:TI 制造商全稱:Texas Instruments 功能描述:1394 Integrated PHY and Link-Layer Controller for SBP-2 Products and DPP Products |
| TSB43AA82AIPGE | 功能描述:1394 接口集成電路 Hi Perf Integr Phy & Link Layer Chip RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB43AA82AIPGEEP | 功能描述:1394 接口集成電路 Mil Enh Int PHY and Link-Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB43AA82APGE | 功能描述:1394 接口集成電路 Hi Perf Integr Phy & Link Layer Chip RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB43AA82APGEG4 | 功能描述:1394 接口集成電路 Hi Perf Integr Phy & Link Layer Chip RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
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