
Introduction
79
December 2003 Revised March 2005
SPRS231D
Table 25. Signal Descriptions (Continued)
SIGNAL
TYPE
DESCRIPTION
ZZG
BALL#
ZDY
BALL#
EXTERNAL MEMORY INTERFACE SLOW (EMIFS) FLASH AND ASYNCHRONOUS MEMORY INTERFACE (CONTINUED)
FLASH.OE
M5
U4
Flash output enable. Active-low output enable output for Flash or SRAM
memories or asynchronous devices.
O
FLASH.RP
N3
W1
Flash power down (TI Flash devices) or reset output (Intel
Flash devices)
Flash write enable. Active-low write enable output for Flash or SRAM
memories or asynchronous devices.
O
FLASH.WE
P3
W2
O
FLASH.WP
R3
V4
Flash write protect. Active-low output for hardware write protection feature
on standard memory devices.
O
MULTIMEDIA CARD/SECURE DIGITAL INPUT/OUTPUT INTERFACES (MMC/SDIOs)
MMC.CLK
M8
V11
MMC/SDIO1 clock. Clock output to the MMC/SD card.
O
MMC.CMD
N7
P11
MMC/SDIO1 command. MMC/SD commands are transferred to/from this
pin.
I/O
MMC.DAT0
R8
R11
MMC/SDIO1 data bit 0. MMC.DAT0 functions as data bit 0 during MMC and
secure digital operation.
I/O
MMC.DAT1
U9
V10
SD card data bit 1. Data bit 1 is used in 4-bit secure digital mode.
I/O
MMC.DAT2
T9
W10
SD card data bit 2. Data bit 2 is used in 4-bit secure digital mode.
I/O
L15
M15
MMC.DAT3
P9
W11
SD card data bit 3. Data bit 3 is used in 4-bit secure digital mode.
I/O
MMC2.CLK
K12
M19
MMC/SDIO2 clock. Clock output to the MMC/SD card.
O
P8
Y10
MMC2.CLKIN
N17
R18
MMC/SDIO2 clock feedback
I
MMC2.CMD
P7
Y8
pin.
I/O
H15
J19
MMC/SDIO2 command. MMC/SD commands are transferred to/from this
MMC2.CMDDIR
U8
V9
MMC/SDIO2 command direction control
O
MMC2.DAT0
J12
L15
and secure digital operation.
I/O
U7
W8
MMC/SDIO2 data bit 0. MMC2.DAT0 functions as data bit 0 during MMC
MMC2.DAT1
J13
L18
MMC/SDIO2 card data bit 1
I/O
R6
V8
MMC2.DAT2
H16
J18
MMC/SDIO2 card data bit 2
I/O
R12
W15
MMC2.DAT3
J17
L19
MMC/SDIO2 card data bit 3
I/O
T7
R10
MMC2.DATDIR0
U3
V5
MMC/SDIO2 data bit 0 direction control
O
MMC2.DATDIR1
I = Input, O = Output, Z = High-Impedance
T17
W19
MMC/SDIO2 data bit 1, 2, 3 direction control
O
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