
Introduction
62
December 2003 Revised March 2005
SPRS231D
Table 24. ZZG Package Terminal Characteristics (Continued)
ZZG
BALL
NO.
SUPPLY
RESET
STATE
#
OTHER
BUFFER
STRENGTH
§
PULLUP/
PULLDN
MUX CTRL SETTING
TYPE
SIGNAL NAME
H19
CAM.EXCLK
O
Reg4[23:21] = 000
PU20,
PD20
3 mA (Hv)
A, F, G1
0
DV
DD8
ETM.SYNC[0]
O
Reg4[23:21] = 001
2 mA (Lv)
UWIRE.SDO
O
Reg4[23:21] = 010
LOW_STATE
O
Reg4[23:21] = 110
GPIO57
I/O
Reg4[23:21] = 111
J15
CAM.LCLK
I
Reg4[26:24] = 000
PU20,
PD20
3 mA (Hv)
A, F
Z
DV
DD8
ETM.CLK
O
Reg4[26:24] = 001
2 mA (Lv)
UWIRE.SCLK
O
Reg4[26:24] = 010
GPIO39
I/O
Reg4[26:24] = 111
J20
MPU_BOOT
I
Reg8[29:27] = 000
3 mA (Hv)
A, F
USB1.SUSP
O
Reg8[29:27] = 010
2 mA (Lv)
J18
CAM.D[7]
I
Reg4[29:27] = 000
PU20,
PD20
3 mA (Hv)
A, F
Z
DV
DD8
ETM.D[7]
O
Reg4[29:27] = 001
2 mA (Lv)
UWIRE.CS0
O
Reg4[29:27] = 010
MMC2.DAT2
I/O
Reg4[29:27] = 011
GPIO35
I/O
Reg4[29:27] = 111
J19
CAM.D[6]
I
Reg5[2:0] = 000
PD20
3 mA (Hv)
A, F
Z
DV
DD8
ETM.D[6]
O
Reg5[2:0] = 001
PU20,
2 mA (Lv)
UWIRE.CS3
O
Reg5[2:0] = 010
MMC2.CMD
I/O
Reg5[2:0] = 011
GPIO34
I/O
Reg5[2:0] = 111
J14
CAM.D[5]
I
Reg5[5:3] = 000
PD20
3 mA (Hv)
A, F
Z
DV
DD8
ETM.D[5]
O
Reg5[5:3] = 001
PU20,
2 mA (Lv)
UWIRE.SDI
I
Reg5[5:3] = 010
GPIO33
I/O
Reg5[5:3] = 111
K18
CAM.D[4]
I
Reg5[8:6] = 000
PU20,
PD20
3 mA (Hv)
A, F
Z
DV
DD8
ETM.D[4]
O
Reg5[8:6] = 001
2 mA (Lv)
UART3.TX
O
Reg5[8:6] = 010
GPIO32
I/O
Reg5[8:6] = 111
I = Input, O = Output, Z = High-Impedance
PD20 = 20-
μ
A internal pulldown, PD100=100-
μ
A internal pulldown, PU20 = 20-
μ
A internal pullup, PU100 = 100-
μ
A internal pullup. Pullup or
pulldown can be enabled or disabled by software.
§
Lv = Low voltage (1.65 V), Hv = High voltage (2.5 V)
A = Standard LVCMOS input/output
G1 = Terminal may be gated by BFAIL
B = SUBLVDS input/ouput
G2 = Terminal may be gated by GPIO9 and MPUIO3
C = USB transceiver input/ouput
G3 = Terminal my be gated by BFAIL and OMAP5912 Internal Reset
D = I
2
C input/output buffers
H1 = Terminal may be 3-stated by BFAIL input
E = Analog oscillator terminals
H3 = MCSI1.DOUT pin can be forced into a high-impedance
F = Boundary-scannable terminal
state by the OMAP5912 HIGH_IMP3 control bit
K = Output buffer includes a serial resistor of 20
to match with PCB line impedance and ensure proper signal integrity
#
Z = High-Impedance, LZ = Low-Impedance (pin is driven), 1 = Output driven high, 0 = Output driven low
NOTES:
3. NA denotes no multiplexing on the ball
4. ‘Regx’ denotes the terminal multiplexing register that controls the specified terminal where Regx = FUNC_MUX_CTRL_x