
Introduction
56
December 2003 Revised March 2005
SPRS231D
Table 23. ZDY Package Terminal Characteristics (Continued)
ZDY
BALL
NO.
SUPPLY
RESET
STATE
#
OTHER
BUFFER
STRENGTH
§
PULLUP/
PULLDN
MUX CTRL SETTING
TYPE
SIGNAL NAME
F2
FLASH.A[10]
O
Reg11[23:21] = 000
2 mA (Lv)
3 mA (Hv)
A, G1
0
DV
DD5
E1
FLASH.A[9]
O
Reg11[26:24] = 000
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, G1
0
DV
DD5
D1
FLASH.A[8]
O
Reg12[5:3] = 000
2 mA (Lv)
3 mA (Hv)
A, G1
0
DV
DD5
E2
FLASH.A[7]
O
Reg12[8:6] = 000
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, G1
0
DV
DD5
C1
FLASH.A[6]
O
Reg12[11:9] = 000
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, G1
0
DV
DD5
D2
FLASH.A[5]
O
Reg12[14:12] = 000
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, G1
0
DV
DD5
E3
FLASH.A[4]
O
Reg12[17:15] = 000
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, G1
0
DV
DD5
E4
FLASH.A[3]
O
Reg12[20:18] = 000
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, G1
0
DV
DD5
C2
FLASH.A[2]
O
Reg12[23:21] = 000
PU20,
PD20
2 mA (Lv)
3 mA (Hv)
A, G1
0
DV
DD5
D3
FLASH.A[1]
O
Reg12[26:24] = 000
2 mA (Lv)
3 mA (Hv)
A, G1
0
DV
DD5
N4 R1
P1 K7
M3 M4
N2 L5
N1 K6
L4 M2
J7 L2
M1 L1
FLASH.D[15:0]
I/O
NA
2 mA (Lv)
3 mA (Hv)
A, K
0
DV
DD5
K1
FLASH.CLK
O
Reg10[23:21] = 000
3 mA (Hv)
A, K, G1
0
DV
DD5
FLASH.CS2UOE
O
Reg10[23:21] = 001
2 mA (Lv)
L6
FLASH.RDY
I
RegF[29:27] = 000
PD20
3 mA (Hv)
A, F
Input
DV
DD5
GPIO10
I/O
RegF[29:27] = 001
PU100,
2 mA (Lv)
I = Input, O = Output, Z = High-Impedance
PD20 = 20-
μ
A internal pulldown, PD100=100-
μ
A internal pulldown, PU20 = 20-
μ
A internal pullup, PU100 = 100-
μ
A internal pullup. Pullup or
pulldown can be enabled or disabled by software.
§
Lv = Low voltage (1.65 V), Hv = High voltage (2.5 V)
A = Standard LVCMOS input/output
G1 = Terminal may be gated by BFAIL
B = SUBLVDS input/ouput
G2 = Terminal may be gated by GPIO9 and MPUIO3
C = USB transceiver input/ouput
G3 = Terminal my be gated by BFAIL and OMAP5912 Internal Reset
D = I
2
C input/output buffers
H1 = Terminal may be 3-stated by BFAIL input
E = Analog oscillator terminals
H3 = MCSI1.DOUT pin can be forced into a high-impedance
F = Boundary-scannable terminal
state by the OMAP5912 HIGH_IMP3 control bit
K = Output buffer includes a serial resistor of 20
to match with PCB line impedance and ensure proper signal integrity
#
Z = High-Impedance, LZ = Low-Impedance (pin is driven), 1 = Output driven high, 0 = Output driven low
NOTES:
3. NA denotes no multiplexing on the ball
4. ‘Regx’ denotes the terminal multiplexing register that controls the specified terminal where Regx = FUNC_MUX_CTRL_x