
Functional Overview
171
December 2003 Revised March 2005
SPRS231D
3.6.5 Pulse-Width Tone (PWT)
The pulse-width tone (PWT) peripheral generates a modulated frequency signal for use with an external
buzzer. The frequency is programmable between 349 Hz and 5276 Hz with 12 half-tone frequencies per
octave. The volume level of the output is also programmable.
3.6.6 Pulse-Width Light (PWL)
The pulse-width light (PWL) peripheral allows the control of the backlight of the LCD and the keypad by
employing a 4096-bit random sequence. This voltage level control technique decreases the spectral power
at the modulator harmonic frequencies. The block uses a switchable 32-kHz clock, independent of UPS.
3.6.7 Keyboard Interface
Keyboard is composed of specific MPUIOs dedicated for 6 x 5 or 8 x 8 keyboard connection:
Eight inputs (KB.R[7:0]) for row lines
Eight outputs (KB.C[7:0]) for column lines
The keyboard feature allows communication with a keyboard. The MPUIO or keyboard interface supports
keyboards with up to eight rows and eight columns and has the capability to detect multiple key presses. A
keyboard event is signaled to the host by an interrupt.
3.6.8 HDQ/1-Wire Interface
This module allows implementation of both HDQ and 1-Wire protocols. These protocols use a single wire to
communicate between a master and a slave. The HDQ/1-Wire pin is open-drain and requires an external
pullup resistor.
HDQ and 1-Wire interfaces can be found on commercially available battery and power management devices.
The interface can be used to send command and monitor its status between OMAP5912 and such devices.
3.6.9 Multimedia Card/Secure Digital (MMC/SDIO1) Interface
The MMC/SDIO1 host controller provides an interface between the MPU and MMC/SD/SDIO memory cards
plus up to four serial flash cards, and it also handles MMC/SDIO transactions with minimum local host
intervention. The following combinations of external devices are supported:
One or more MMC memory cards sharing the same bus
One single SD memory card or SDIO card
The application interface is responsible for managing transaction semantics; the MMC/SDIO1 host controller
deals with MMC/SDIO protocol at transmission level, packing data, adding CRC, start/end bit and checking
for syntactical correctness. SD mode wide bus width is also supported (1- or 4-bit data lines).
The application interface can send every MMC/SDIO command and either poll for the status of the adapter
or wait for an interrupt request, which is sent back in case of exceptions or to notify for end of operations. The
application interface can read card responses or flag register. It can also mask individually interrupt sources.
All these operations can be performed reading and writing control registers. The MMC/SDIO1 peripheral also
supports two DMA channels.The main features of the MMC/SDIO1 module are:
Full compliance with MMC command/response sets as defined in the MMC standard specifications v.3.1
Full compliance with SD command/response sets as defined in the SD physical layer specifications v.1.0
Full compliance with SDIO command/response sets as defined in the SDIO card specification v1.0
Flexible architecture, allowing support for new command structure