
Introduction
60
December 2003 Revised March 2005
SPRS231D
Table 24. ZZG Package Terminal Characteristics (Continued)
ZZG
BALL
NO.
SUPPLY
RESET
STATE
#
OTHER
BUFFER
STRENGTH
§
PULLUP/
PULLDN
MUX CTRL SETTING
TYPE
SIGNAL NAME
B18
LCD.VS
O
RegE[11:9] = 000
3 mA (Hv)
A, F, G1
0
DV
DD1
Z_STATE
Z
RegE[11:9] = 001
2 mA (Lv)
D17
LCD.P[8]
O
RegE[14:12] = 000
3 mA (Hv)
A, F, G1
0
DV
DD1
Z_STATE
Z
RegE[14:12] = 001
2 mA (Lv)
GPIO29
I/O
RegE[14:12] = 111
C18
LCD.P[7]
O
RegE[17:15] = 000
3 mA (Hv)
A, F, G1
0
DV
DD1
Z_STATE
Z
RegE[17:15] = 001
2 mA (Lv)
B19
LCD.P[6]
O
RegE[20:18] = 000
3 mA (Hv)
A, F, G1
0
DV
DD1
Z_STATE
Z
RegE[20:18] = 001
2 mA (Lv)
A20
LCD.P[5]
O
RegE[23:21] = 000
3 mA (Hv)
A, F, G1
0
DV
DD1
Z_STATE
Z
RegE[23:21] = 001
2 mA (Lv)
H13
LCD.P[4]
O
RegE[26:24] = 000
3 mA (Hv)
A, F, G1
0
DV
DD1
Z_STATE
Z
RegE[26:24] = 001
2 mA (Lv)
G14
LCD.P[3]
O
RegE[29:27] = 000
3 mA (Hv)
A, F, G1
0
DV
DD1
Z_STATE
Z
RegE[29:27] = 001
2 mA (Lv)
C19
LCD.P[2]
O
RegF[2:0] = 000
3 mA (Hv)
A, F, G1
0
DV
DD1
Z_STATE
Z
RegF[2:0] = 001
2 mA (Lv)
B21
LCD.P[1]
O
RegF[5:3] = 000
3 mA (Hv)
A, F, G1
0
DV
DD1
Z_STATE
Z
RegF[5:3] = 001
2 mA (Lv)
D18
LCD.P[0]
O
RegF[8:6] = 000
3 mA (Hv)
A, F, G1
0
DV
DD1
Z_STATE
Z
RegF[8:6] = 001
2 mA (Lv)
C20
LCD.HS
O
RegD[14:12] = 000
3 mA (Hv)
A, F, G1
0
DV
DD1
Z_STATE
Z
RegD[14:12] = 001
2 mA (Lv)
C21
KB.C[4]
O
Reg3[5:3] = 000
PU20,
PD20
3 mA (Hv)
A, F
0
DV
DD1
GPIO27
I/O
Reg3[5:3] = 111
2 mA (Lv)
E18
KB.C[3]
O
Reg3[8:6] = 000
PU20,
PD20
3 mA (Hv)
A, F
0
DV
DD1
GPIO63
I/O
Reg3[8:6] = 111
2 mA (Lv)
D19
KB.C[2]
O
Reg3[11:9] = 000
PU20,
PD20
3 mA (Hv)
A, F
0
DV
DD1
GPIO61
I/O
Reg3[11:9] = 111
2 mA (Lv)
D20
KB.C[1]
O
Reg3[14:12] = 000
PU20,
PD20
3 mA (Hv)
A, F
0
DV
DD1
MPUIO6
I/O
Reg3[14:12] = 001
2 mA (Lv)
I = Input, O = Output, Z = High-Impedance
PD20 = 20-
μ
A internal pulldown, PD100=100-
μ
A internal pulldown, PU20 = 20-
μ
A internal pullup, PU100 = 100-
μ
A internal pullup. Pullup or
pulldown can be enabled or disabled by software.
§
Lv = Low voltage (1.65 V), Hv = High voltage (2.5 V)
A = Standard LVCMOS input/output
G1 = Terminal may be gated by BFAIL
B = SUBLVDS input/ouput
G2 = Terminal may be gated by GPIO9 and MPUIO3
C = USB transceiver input/ouput
G3 = Terminal my be gated by BFAIL and OMAP5912 Internal Reset
D = I
2
C input/output buffers
H1 = Terminal may be 3-stated by BFAIL input
E = Analog oscillator terminals
H3 = MCSI1.DOUT pin can be forced into a high-impedance
F = Boundary-scannable terminal
state by the OMAP5912 HIGH_IMP3 control bit
K = Output buffer includes a serial resistor of 20
to match with PCB line impedance and ensure proper signal integrity
#
Z = High-Impedance, LZ = Low-Impedance (pin is driven), 1 = Output driven high, 0 = Output driven low
NOTES:
3. NA denotes no multiplexing on the ball
4. ‘Regx’ denotes the terminal multiplexing register that controls the specified terminal where Regx = FUNC_MUX_CTRL_x