
Functional Overview
131
December 2003 Revised March 2005
SPRS231D
Table 329. McBSP2 Registers (Continued)
MPU BYTE
ADDRESS
RESET
VALUE
ACCESS
TYPE
ACCESS
WIDTH
DESCRIPTION
REGISTER NAME
FFFB:1032
MCBSP2_XCERE
McBSP2 Transmit channel enable register partition E
16
R/W
0000h
FFFB:1034
MCBSP2_XCERF
McBSP2 Transmit channel enable register partition F
16
R/W
0000h
FFFB:1036
MCBSP2_RCERG
McBSP2 Receive channel enable register partition G
16
R/W
0000h
FFFB:1038
MCBSP2_RCERH
McBSP2 Receive channel enable register partition H
16
R/W
0000h
FFFB:103A
MCBSP2_XCERG
McBSP2 Transmit channel enable register partition G
16
R/W
0000h
FFFB:103C
MCBSP2_XCERH
McBSP2 Transmit channel enable register partition H
16
R/W
0000h
FFFB:103E
MCBSP2_REV
McBSP2 Version register
16
R/W
0011h
Table 330. General-Purpose Timer1 Registers
DSP WORD
ADDRESS
MPU BYTE
ADDRESS
REGISTER NAME
DESCRIPTION
ACCESS
WIDTH
ACCESS
TYPE
RESET
VALUE
0x00 8A00h
FFFB:1400
GPTMR1_TIDR
GPTimer1 Identification Register
16/32
R
0000 0010h
0x00 8A02h
FFFB:1404
Reserved
0x00 8A08h
FFFB:1410
GPTMR1_TIOCP_CFG
GPTimer1 OCP Configuration Register
16/32
R/W
0000 0000h
0x00 8A0Ah
FFFB:1414
GPTMR1_TISTAT
GPTimer1 System Status Register
16/32
R
0000 0000h
0x00 8A0Ch
FFFB:1418
GPTMR1_TISR
GPTimer1 Status Register
16/32
R/W
0000 0000h
0x00 8A0Eh
FFFB:141C
GPTMR1_TIER
GPTimer1 Interrupt Enable Register
16/32
R/W
0000 0000h
0x00 8A10h
FFFB:1420
GPTMR1_TWER
GPTimer1 Wake Up Enable Register
16/32
R/W
0000 0000h
0x00 8A12h
FFFB:1424
GPTMR1_TCLR
GPTimer1 Control Register
16/32
R/W
0000 0000h
0x00 8A14h
FFFB:1428
GPTMR1_TCRR
GPTimer1 Counter Register
16/32
R/W
0000 0000h
0x00 8A16h
FFFB:142C
GPTMR1_TLDR
GPTimer1 Load Register
16/32
R/W
0000 0000h
0x00 8A18h
FFFB:1430
GPTMR1_TTGR
GPTimer1 Trigger Register
16/32
R/W
FFFF FFFFh
0x00 8A1Ah
FFFB:1434
GPTMR1_TWPS
GPTimer1 Write Posted Register
16/32
R
0000 0000h
0x00 8A1Ch
FFFB:1438
GPTMR1_TMAR
GPTimer1 Match Register
16/32
R/W
0000 0000h
0x00 8A20h
FFFB:1440
GPTMR1_TSICR
GPTimer1 Synchronization Interface
Control Register
16/32
R/W
0000 0004h
Table 331. General-Purpose Timer2 Registers
DSP WORD
ADDRESS
MPU BYTE
ADDRESS
REGISTER NAME
DESCRIPTION
ACCESS
WIDTH
ACCESS
TYPE
RESET
VALUE
0x00 8E00h
FFFB:1C00
GPTMR2_TIDR
GPTimer2 Identification Register
16/32
R
0000 0010h
0x00 8E02h
FFFB:1C04
Reserved
0x00 8E08h
FFFB:1C10
GPTMR2_TIOCP_CFG
GPTimer2 OCP Configuration Register
16/32
R/W
0000 0000h
0x00 8E0Ah
FFFB:1C14
GPTMR2_TISTAT
GPTimer2 System Status Register
16/32
R
0000 0000h
0x00 8E0Ch
FFFB:1C18
GPTMR2_TISR
GPTimer2 Status Register
16/32
R/W
0000 0000h
0x00 8E0Eh
FFFB:1C1C
GPTMR2_TIER
GPTimer2 Interrupt Enable Register
16/32
R/W
0000 0000h
0x00 8E10h
FFFB:1C20
GPTMR2_TWER
GPTimer2 Wake Up Enable Register
16/32
R/W
0000 0000h
0x00 8E12h
FFFB:1C24
GPTMR2_TCLR
GPTimer2 Control Register
16/32
R/W
0000 0000h
0x00 8E14h
FFFB:1C28
GPTMR2_TCRR
GPTimer2 Counter Register
16/32
R/W
0000 0000h
0x00 8E16h
FFFB:1C2C
GPTMR2_TLDR
GPTimer2 Load Register
16/32
R/W
0000 0000h
0x00 8E18h
FFFB:1C30
GPTMR2_TTGR
GPTimer2 Trigger Register
16/32
R/W
FFFF FFFFh
0x00 8E1Ah
FFFB:1C34
GPTMR2_TWPS
GPTimer2 Write Posted Register
16/32
R
0000 0000h
0x00 8E1Ch
FFFB:1C38
GPTMR2_TMAR
GPTimer2 Match Register
16/32
R/W
0000 0000h
0x00 8E20h
FFFB:1C40
GPTMR2_TSICR
GPTimer2 Synchronization Interface
Control Register
16/32
R/W
0000 0004h