
Functional Overview
102
December 2003 Revised March 2005
SPRS231D
3.2.2 MPU Subsystem Registers Memory Map
The MPU accesses peripheral and configuration registers in the same way that internal and external memory
are accessed. The following tables specify the MPU base addresses where each set of registers is accessed.
All accesses to these registers must utilize the appropriate access width (8-, 16-, or 32-bit-wide accesses) as
indicated in the tables. Accessing registers with the incorrect access width are illegal.
WARNING: Access to Reserved areas is illegal.
3.2.2.1
MPU Private Peripheral Registers
The MPU private peripheral registers include the following:
MPU Level 2 Interrupt Handler Registers
LCDCONV Registers
LCD Controller Registers
MPU Timer1 Registers
MPU Timer2 Registers
MPU Timer3 Registers
MPU Watchdog Timer Registers
MPU Level 1 Interrupt Handler Registers
System DMA Controller Registers
Table 33. MPU Level 2 Interrupt Handler Registers
BYTE
ADDRESS
REGISTER NAME
DESCRIPTION
ACCESS
WIDTH
ACCESS
TYPE
RESET
VALUE
FFFE:0000
MPU_L2_ITR
Interrupt Register
32
R/W
0000 0000h
FFFE:0004
MPU_L2_MIR
Interrupt Mask Register
32
R/W
FFFFFFFFh
FFFE:0008
RESERVED
Reserved
FFFE:000C
RESERVED
Reserved
FFFE:0010
MPU_L2_SIR_IRQ
Interrupt Encoded Source (IRQ) Register
32
R
0000 0000h
FFFE:0014
MPU_L2_SIR_FIQ
Interupt Encoded Source (FIQ) Register
32
R
0000 0000h
FFFE:0018
MPU_L2_CONTROL
Interrupt Control Register
32
R/W
0000 0000h
FFFE:001C
MPU_L2_ILR0
Interrupt Priority Level For IRQ 0 Register
32
R/W
0000 0000h
FFFE:0020
MPU_L2_ILR1
Interrupt Priority Level For IRQ 1 Register
32
R/W
0000 0000h
FFFE:0024
MPU_L2_ILR2
Interrupt Priority Level For IRQ 2 Register
32
R/W
0000 0000h
FFFE:0028
MPU_L2_ILR3
Interrupt Priority Level For IRQ 3 Register
32
R/W
0000 0000h
FFFE:002C
MPU_L2_ILR4
Interrupt Priority Level For IRQ 4 Register
32
R/W
0000 0000h
FFFE:0030
MPU_L2_ILR5
Interrupt Priority Level For IRQ 5 Register
32
R/W
0000 0000h
FFFE:0034
MPU_L2_ILR6
Interrupt Priority Level For IRQ 6 Register
32
R/W
0000 0000h
FFFE:0038
MPU_L2_ILR7
Interrupt Priority Level For IRQ 7 Register
32
R/W
0000 0000h
FFFE:003C
MPU_L2_ILR8
Interrupt Priority Level For IRQ 8 Register
32
R/W
0000 0000h
FFFE:0040
MPU_L2_ILR9
Interrupt Priority Level For IRQ 9 Register
32
R/W
0000 0000h
FFFE:0044
MPU_L2_ILR10
Interrupt Priority Level For IRQ 10 Register
32
R/W
0000 0000h