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參數(shù)資料
| 型號： | MT8LLN22NCNE |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA316 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-316 |
| 文件頁數(shù)： | 79/145頁 |
| 文件大小： | 2285K |
| 代理商： | MT8LLN22NCNE |
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Coppertail Product Specification
MT8LLN22NCNE.fm – Rev. 1, Pub. 2/02
39
2002, Micron Technology Inc.
PRELIMINARY
MT8LLN22NCNE
COPPERTAIL
2
GPA1R. Capture reads enable. When set, the south bridge will observe
the address, data, byte enables, and command for a read transaction
that falls into the General Purpose Trap Address 1 (GPTA1) and store
them in TRAP_ADDR, TRAP_DATA, and TRAP_CMND. The address, status,
and space type is defined in GPAR1. The address bits to be masked as
part of the trap are defined in DEVCTL. The trap will be performed inde-
pendent of whether SMI traps are enabled in general or if the SMI trap is
enabled for GPTA1.
R/W
0
1
GPA0R. Capture writes enable. When set, the south bridge will observe
the address, data, byte enables, and command for a write transaction
that falls into the General Purpose Trap Address 1 (GPTA0) and store
them in TRAP_ADDR, TRAP_DATA, and TRAP_CMND. The address, status,
and space type is defined in GPAR0. The address bits to be masked as
part of the trap are defined in DEVCTL. The trap will be performed inde-
pendent of whether SMI traps are enabled in general or if the SMI trap is
enabled for GPTA0.
R/W
0
GPA0R. Capture reads enable. When set, the south bridge will observe
the address, data, byte enables, and command for a read transaction
that falls into the General Purpose Trap Address 1 (GPTA0) and store
them in TRAP_ADDR, TRAP_DATA, and TRAP_CMND. The address, status,
and space type is defined in GPAR0. The address bits to be masked as
part of the trap are defined in DEVCTL. The trap will be performed inde-
pendent of whether SMI traps are enabled in general or if the SMI trap is
enabled for GPTA0.
R/W
0
Multifunction Disable (Device 7h, Function 0h)
ADDRESS: A3h
SYMBOL: MUL_DIS
BITS
DESCRIPTION
PROPERTIES
RESET
7:3
Reserved
R/W
0
2
Disable USB configuration. When set, all configuration accesses to USB
function will be responded to as if this function did not exist. When clear,
configuration accesses to USB function will respond normally.
R/W
0
1
Disable IDE configuration. When set, all configuration accesses to IDE
function will be responded to as if this function did not exist. When clear,
configuration accesses to IDE function will respond normally.
R/W
0
Disable SMB configuration. When set, all configuration accesses to SMB
function will be responded to as if this function did not exist. When clear,
configuration accesses to SMB function will respond normally.
R/W
0
Extended Trap Control (Device 7h, Function 0h) (continued)
ADDRESS: A2h
SYMBOL: EXT_TRAP
BITS
DESCRIPTION
PROPERTIES
RESET
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MT8LLN22NCNE-A | 制造商:Micron Technology Inc 功能描述:COPPERTAIL CHIPSET - Trays |
| MT8LLN22NCNE-A2 | 制造商:Micron Technology Inc 功能描述:COPPERTAIL CHIPSET AND MOTHERBOARD - Trays |
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