
Coppertail Product Specification
MT8LLN22NCNE.fm – Rev. 1, Pub. 2/02
2
2002, Micron Technology Inc.
PRELIMINARY
MT8LLN22NCNE
COPPERTAIL
OVERVIEW
Interfaces to Copperhead host controller through
the PCI bus
Two independent ATA/100 IDE channels
Four USB ports
LPC interface to super I/O
System Management Bus Controller
FEATURES
PCI Interface to Host Controller
32-bit 33 MHz PCI interface
USB
Four ports
Compliant with USB specification version 1.1
Support for wake-up from sleeping states S1-S4
Compliant with Open HCI specification version 1.0
Support for PCI specification version 2.2
Legacy keyboard and mouse support
Interface Specification version 1.0
Integrated IDE Controller
Independent timing of up to four drives
Ultra ATA/100/66/33 mode support
PIO Mode Four transfers up to 14 MB/s
Separate IDE connections for primary and second-
ary cables (separate data)
Low Pin Count (LPC) Interface
Legacy ISA and X-Bus devices such as Super I/O
connection
Support for two DMA devices
BIOS on LPC bus support
82C54-Based Timers
System timer, refresh request, speaker tone output
Enhanced DMA Controller
Two cascaded 8237 DMA controllers
Support for LPC DMA
Real-Time Clock
256-byte battery-backed CMOS SRAM
Data alarm
ACPI and Y2K compliant
Interrupt Controller
Two cascaded 82C59
15 interrupt support in 82C59 mode
Integrated I/O APIC with 40 interrupt inputs (20 PCI
interrupts external)
Supports PCI 2.2 message signaled interrupts
Support for serial interrupt protocol
Power Management Logic
Compliant with ACPI 2.0 and APM 1.2
ACPI-defined power states (S1, S3, S4, S5) and CPU
power states
Support for Suspend-to-RAM with DDR DRAM
placed in Self-Refresh
ACPI power management timer
SMI# generation
All registers readable/restorable for proper resume
from 0V suspend states
PCI PME#
Supports up to 41 general purpose I/O and wake
events.
SMBus
Integrated SMBus master/target interface
Read/Write access to PCI configuration registers
through SMB target.
Package
316-pin plastic BGA