
Coppertail Product Specification
MT8LLN22NCNE.fm – Rev. 1, Pub. 2/02
16
2002, Micron Technology Inc.
PRELIMINARY
MT8LLN22NCNE
COPPERTAIL
GPIO[14]
I/O
Standby Shared with ALERT.
GPIO
[13:10]
I/O
Not implemented.
GPIO[08]
I/O
Standby Shared with H_THRM#.
GPIO
[07:00]
I/O
Not implemented
GPIO_VAUX
[15:0]
I/O
Standby
General Purpose I/Os. Are capable of being wake events for S0, S1, S3, S4,
and S5. 16 general purpose I/O wake events.
GPIO_VCORE
[15:0]
I/O
VDD3.3
General Purpose I/Os. Are capable of being wake events for S0, S1. 16
general purpose I/O.
General Purpose Signals (continued)
SIGNAL
TYPE
POWER
PLANE
DESCRIPTION
Miscellaneous
SIGNAL
TYPE
POWER
PLANE
DESCRIPTION
SB_RTC_OSC_
Y1
OBattery
SB_RTC_OSC_Y1 (Crystal/Oscillator Input) is connected to the 32.786 KHz
crystal output.
SB_RTC_OSC_
Y2
IBattery
SB_RTC_OSC_Y2 (Crystal/Oscillator Input) is the 32.768 KHz crystal input
for the internal real time clock.
SB_SPKR
O
VDD3.3
The SB_SPKR signal is the output of counter timer 2 and is logically
"AND" with Port 061h bit 1 to provide the Speaker Data Enable. This sig-
nal drives an external speaker driver device.
Power/System Management
SIGNAL
TYPE
POWER
PLANE
DESCRIPTION
H_THRM#/
GPIO[8]
IVDD2.5
Generated by external hardware to initiate clock throttling using
H_STPCLK#, for the purposes of cooling down an overheating CPU. This sig-
nal may also generate and SMI or SCI. Optional GPIO.
P_PME#
I
Standby
PCI Power Management Event is used to generate SMI or SCI interrupts as
well as resume events.
PWR_
BUTTON#
I
Standby
Power Button. When the system is in the soft off (S5) state, this signal con-
trols the automatic transition to full on (S0). PWR_BUTTON# can be pro-
grammed to generate SCI or SMI interrupts from any state other than soft
off. If asserted for four seconds from any state other than soft off, a power
button override event is generated, transitioning the system to soft off
state. PM1_STS Fixed Feature Status Register may be used to determine
status.
PWR_EXT_
SMI#
I
Standby
External SMI can be used to generate SMI or SCI interrupts and resume
events. Typically used as the Super-IO SMI.