參數(shù)資料
型號: MT8LLN22NCNE
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, PBGA316
封裝: 27 X 27 MM, PLASTIC, BGA-316
文件頁數(shù): 67/145頁
文件大?。?/td> 2285K
代理商: MT8LLN22NCNE
Coppertail Product Specification
MT8LLN22NCNE.fm – Rev. 1, Pub. 2/02
28
2002, Micron Technology Inc.
PRELIMINARY
MT8LLN22NCNE
COPPERTAIL
DMA Control (Device 7h, Function 0h)
ADDRESS: 48h-4Bh
SYMBOL: DMA_CTRL
BITS
DESCRIPTION
PROPERTIES
RESET
31:29
Reserved
R/W
0
28
Reserved. Must be set.
R/W
0
27
When set, disables an LPC abort response from clearing the DMA
request. When clear, LPC abort response is treated normally.
R/W
0
26
When set, disables an LPC error response from clearing the DMA request.
When clear, LPC error response is treated normally.
R/W
0
25
When set, disables requests from memory for masked channels. When
clear, requests are treated normally.
R/W
0
24
When set, disables writes to the master clear register from clearing the
DMA request. When clear, DMA behaves normally.
R/W
0
23
DMA Channel 7 Disable. When set, the DMA channel will not perform
LPC DMA. When clear, the DMA channel may perform LPC DMA.
R/W
0
22
DMA Channel 6 Disable. When set, the DMA channel will not perform
LPC DMA. When clear, the DMA channel may perform LPC DMA.
R/W
0
21
DMA Channel 5 Disable. When set, the DMA channel will not perform
LPC DMA. When clear, the DMA channel may perform LPC DMA.
R/W
0
20
DMA Channel 4 Disable. When set, the DMA channel will not perform
LPC DMA. When clear, the DMA channel may perform LPC DMA.
R/W
0
19
DMA Channel 3 Disable. When set, the DMA channel will not perform
LPC DMA. When clear, the DMA channel may perform LPC DMA.
R/W
0
18
DMA Channel 2 Disable. When set, the DMA channel will not perform
LPC DMA. When clear, the DMA channel may perform LPC DMA.
R/W
0
17
DMA Channel 1 Disable. When set, the DMA channel will not perform
LPC DMA. When clear, the DMA channel may perform LPC DMA.
R/W
0
16
DMA Channel 0 Disable. When set, the DMA channel will not perform
LPC DMA. When clear, the DMA channel may perform LPC DMA.
R/W
0
15:14
DMA Channel 7 LPC Cycle Size. Allowable values are:
00: 1 byte
01: 2 bytes
11: 4 bytes
R/W
01b
13:12
DMA Channel 6 LPC Cycle Size. Allowable values are:
00: 1 byte
01: 2 bytes
11: 4 bytes
R/W
01b
11:10
DMA Channel 5 LPC Cycle Size. Allowable values are:
00: 1 byte
01: 2 bytes
11: 4 bytes
R/W
01b
9:8
DMA Channel 4 LPC Cycle Size. Allowable values are:
00: 1 byte
01: 2 bytes
11: 4 bytes
R/W
00b
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