參數(shù)資料
型號： MT8LLN22NCNE
元件分類： 總線控制器
英文描述： PCI BUS CONTROLLER, PBGA316
封裝： 27 X 27 MM, PLASTIC, BGA-316
文件頁數(shù)： 56/145頁
文件大?。?/td> 2285K
代理商： MT8LLN22NCNE
Coppertail Product Specification
MT8LLN22NCNE.fm – Rev. 1, Pub. 2/02
18
2002, Micron Technology Inc.
PRELIMINARY
MT8LLN22NCNE
COPPERTAIL
P_RST#
I/O
Standby
PCI Reset. The I/O Controller asserts P_RST# to reset devices that reside on
the PCI bus. The I/O Controller asserts P_RST# during power-up, while power
is down, and when software initiates a hard reset sequence through the
Reset Control register (CF9h) or through (Function 0, Offset 50h, bit 8). The
I/O Controller drives P_RST# inactive a minimum of 1 ms after SB_POWEROK
is driven active. The I/O Controller drives P_RST# active a minimum of 1ms
when initiated through the Reset Control register.
PCLK
I
VDD3.3
PCI Bus Clock. PCLK provides timing for all transactions on the PCI bus. All
signals except P_RST# and P_INT[D:A] are sampled on the rising edge of
PCLK, and all timing parameters are defined with respect to this edge. PCLK
runs at a frequency up to 33MHz. This clock is permitted to stop during S3 or
lower power states.
RSMRST#
I
Standby
Mechanical off reset. Used for resetting the standby power plane logic. Gen-
erated by the power supply to indicate that standby power is not present or
stable. Input expects a 2.5V standby powered signal
RTCRST
I
Standby
Real Time Clock reset. Tie to ground with a 4.7K resistor. When high with
standby power present the battery backed logic in the RTC will be reset.
USBCLK48
I
VDD3.3
48 MHz USB clock is input to the I/O Controller from an external source. This
clock is used to run the USB portion of the control logic. This clock is permit-
ted to stop during S3 or lower power states.
Reset and Clock Signals (continued)
SIGNAL
TYPE
POWER
PLANE
DESCRIPTION
Test
SIGNAL
TYPE
POWER
PLANE
DESCRIPTION
SB_BYPASS
I
Standby
South Bridge bypass strap. Tie to GND through a 4.7K ohm resistor. Pulling
to standby power will bypass the logic gating off internal signals when core
power is not present from the core plane to the standby and battery planes.
T_IDDT
I
Standby Test input. Connect to Standby power through a 10K ohm resistor.
T_TN
I
Standby Test input. Connect to GND through a 1K ohm resistor.
Reference Signals
SIGNAL
TYPE
POWER
PLANE
DESCRIPTION
PLL_VDDA_P
I
PCLK PLL Analog VDD. Powered by 2.5V.
H_VREF
I
Reference voltage for H_A20M#, H_FERR#, H_INIT#, H_INTR, H_NMI,
H_SLEEP, H_THRM#, and APIC_D[1:0].
相關(guān)PDF資料
PDF描述
MTB10N40ET4 10 A, 400 V, 0.55 ohm, N-CHANNEL, Si, POWER, MOSFET
MTB15N06V 15 A, 60 V, 0.12 ohm, N-CHANNEL, Si, POWER, MOSFET
MTB15N06VT4 15 A, 60 V, 0.12 ohm, N-CHANNEL, Si, POWER, MOSFET
MTB16N25E 16 A, 250 V, 0.25 ohm, N-CHANNEL, Si, POWER, MOSFET
MTB16N25ET4 16 A, 250 V, 0.25 ohm, N-CHANNEL, Si, POWER, MOSFET
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT8LLN22NCNE-A 制造商:Micron Technology Inc 功能描述:COPPERTAIL CHIPSET - Trays
MT8LLN22NCNE-A2 制造商:Micron Technology Inc 功能描述:COPPERTAIL CHIPSET AND MOTHERBOARD - Trays
MT8LSDF3264WG-133D1 制造商:Micron Technology Inc 功能描述:256MB 32MX64 SYNCH DRAM MODULE MICRO DIMM 3.3V - Trays
MT8LSDT1664 制造商:Micron Technology Inc 功能描述:128MB 16MX64 SDRAM MODULE PBF DIMM 3.3V - Trays
MT8LSDT1664AG-10EB1 制造商:Micron Technology Inc 功能描述:DRAM MOD SDRAM 1GBIT 168UDIMM - Trays
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*