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IBM21P100BGC
IBM 133 PCI-X Bridge R2.0
JTAG Boundary Scan
ppb20_jtag.fm.01
October 15, 2001
9.3 Bypass Register
This register is a 1-bit shift register that provides a single bit scan path between the JTG_TDI input and the
JTG_TDO output. This abbreviated scan path is selected by the BYPASS instruction code and is used to
shorten the overall scan ring length during board-level testing when the bridge is not involved.
9.4 Device ID Register
This register, defined by IEEE Standard 1149.1, identifies IBM as the manufacturer of the IBM 133 PCI-X
Bridge R2.0 and provides a portion of the die part number and a revision code for the device.
9.5 Boundary-Scan Register
The Boundary-Scan register is formed by connecting boundary scan cells placed at the device’s signal pins
into a shift register path. The input to the shift register is the JTG_TDI signal and the output from the shift
register is the JTG_TDO signal. When selected and controlled properly by the TAP Controller, this structure
provides the output drive and input visibility features necessary for effective boundary-scan testing.
Several varieties of boundary-scan cells are possible, selected according to the function of the signal pin with
which they are associated:
Width
32 bits
Access
Read only
Reset Value
x‘1490049’
Version
Part Number
Manufacturer ID
Fi
x
e
d
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Bits
Access
Field Name and Description
31:28
RO
Version number of the device.
27:12
RO
Last four hex digits of the BEOL die part number.
11:1
RO
JEDEC-assigned identifier for manufacturer (IBM).
0
RO
Fixed bit equal to b‘1’.
Input-only pins:
For device inputs that are not shared with component test functions, the boundary-
scan cell IBM1149_BSR_BIDIIN is used. Inputs that are shared with component
test functions use the IBM1149_BSR_IN boundary-scan cell. Both have the BSDL
function label of ‘INPUT’.