參數(shù)資料
型號: IBM21P100BGC
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, PBGA304
封裝: 31 X 31 MM, PLASTIC, BGA-304
文件頁數(shù): 111/144頁
文件大?。?/td> 5197K
代理商: IBM21P100BGC
IBM21P100BGC
IBM 133 PCI-X Bridge R2.0
ppb20_pcix_regs.fm.01
October 15, 2001
Configuration Registers
Page 69 of 144
5.2.5.3 Miscellaneous Control Register
This register provides controls for miscellaneous functions, such as handling parity errors, in the bridge.
Address Offset
x‘44’
Access
Read/Write
Reset Value
x‘03’ When P_CFG_BUSY (pin C6) is tied low.
strapping considerations.
x‘07’ When P_CFG_BUSY (pin C6) is tied high.
strapping considerations.
Re
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ry
C
on
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B
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D
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P
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E
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R
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E
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bl
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Pa
ri
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Err
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B
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7
6
5
4
3
2
1
0
Bit(s)
Access
Field Name and Description
7:3
RO
Reserved
2
RW
Primary Config Busy
This bit has R/W access from the secondary bus only. Configuration commands received from the primary bus
can read, but cannot write this bit. The reset value of this bit depends on how the P_CFG_BUSY strapping pin
is tied. When this bit is a b'1', all type 0 configuration commands received on the primary bus are retried.
0
Type 0 configuration commands accepted normally on the primary bus.
1
Type 0 configuration commands retried on the primary bus.
1
RW
Data Parity Error Recovery Enable
0
Allow the bridge to pass parity errors through the bridge.
1
Cause SERR# to be asserted whenever either Master Data Parity Error bit (bit 8 in either the Status or
the Secondary Status register) is set.
The default value after reset is b‘1’.
0
RW
Parity Error Behavior
This bit defines the bridge’s behavior when detecting a data parity error on a non-posted write transaction.
0
The bridge will pass the corrupted data sequence, PERR# will be asserted (if enabled), but the bridge
will not compare the data and BE# for performing completion on the initiating bus.
1
The transaction will be completed on the originating bus, PERR# will be asserted (if enabled), the
appropriate status bits will be set, the data will be discarded and no request will be enqueued.
The default value after reset is b‘1’.
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