- 您現在的位置：買賣IC網 > PDF目錄67681 > IBM21P100BGC PCI BUS CONTROLLER, PBGA304 PDF資料下載
參數資料
| 型號： | IBM21P100BGC |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA304 |
| 封裝： | 31 X 31 MM, PLASTIC, BGA-304 |
| 文件頁數： | 141/144頁 |
| 文件大?。?/td> | 5197K |
| 代理商： | IBM21P100BGC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁當前第141頁第142頁第143頁第144頁
IBM21P100BGC
IBM 133 PCI-X Bridge R2.0
Configuration Registers
Page 96 of 144
ppb20_pcix_regs.fm.01
October 15, 2001
5.2.5.30 Miscellaneous Control Register 2
This register provides additional control over the memory read prefetch algorithm employed by the IBM 133
PCI-X Bridge R2.0 when both the primary and secondary buses are in PCI mode.
Address Offset
x‘B8’
Access
See individual fields.
Reset Value
b‘0000 0000 0000 00x0’
S
h
or
t
T
e
rm
C
ac
hi
ng
Reserved
P
rim
ar
y
P
re
fe
tch
P
er
sistenc
e
C
ontr
o
l
S
e
condar
y
P
re
fe
tch
P
er
s
istence
C
ontr
o
l
Reserved
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Bit(s)
Access
Field Name and Description
15
R/W
Short Term Caching
This is used to control the Short Term Caching feature of the IBM 133 PCI-X Bridge R2.0.
0
Disabled
1
Enabled.
Note: A clear understanding all of the secondary side device’s device drivers and memory architectures, and
ensuring that the
PCI to PCI Bridge Architecture Specification as stated in Chapter 5, sections 5.1 Prefetching
Read Data and 5.6.2 Stale Data has been strongly adhered to, is required to prevent stale data from being
deliveredtothe master.
14:10
RW
Reserved
Modifying the contents of this field will have serious and unpredictable affects on the operation of the IBM 133
PCI-X Bridge R2.0
9
RW
Primary Prefetch Persistence Control
Affects the how the bridge reacts to target disconnect when prefetching data on the secondary bus for read
transactions that are initiated on the primary bus.
0
Discontinue prefetching when the target disconnects regardless of how much data has been buffered
1
Continue prefetching despite target disconnects until either: the byte count specified by Primary Data
Buffering Control Register has been prefetched, or the initiator disconnects.
8
RW
Secondary Prefetch Persistence Control
Affects the how the bridge reacts to target disconnect when prefetching data on the primary bus for read trans-
actions that are initiated on the secondary bus.
0
Discontinue prefetching when the target disconnects regardless of how much data has been buffered
1
Continue prefetching despite target disconnects until either: the byte count specified by Secondary
Data Buffering Control Register has been prefetched, or the initiator disconnects.
相關PDF資料 |
PDF描述 |
|---|---|
| IBM25403GCX-3JC76C2 | RISC PROCESSOR, PQFP16 |
| IBM25405GP-3BA200C2 | RISC PROCESSOR, PBGA456 |
| IBM25EMPPC603EFG-100 | 32-BIT, 100 MHz, RISC PROCESSOR, PQFP240 |
| IBM25EMPPC603EBG-100 | 32-BIT, 100 MHz, RISC PROCESSOR, CBGA255 |
| IBM25EMPPC740LDBC4000 | 32-BIT, 400 MHz, RISC PROCESSOR, CBGA255 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IBM24L5086 | 制造商:AVED MEMORY PRODUCTS 功能描述: 制造商:AVED Memory Products 功能描述: |
| IBM25403GCX-3BC80C2 | 制造商:IBM 功能描述:RISC PROCESSOR, 160 Pin Plastic BGA |
| IBM25403GCX-3JC50C2 | 制造商:IBM 功能描述:403GCX-3JC50C2 |
| IBM25403GCX-3JC66C2 | 制造商:IBM 功能描述: |
| IBM25403GCX3JC76C2 | 制造商:IBM 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。