參數(shù)資料
型號(hào): L64360
廠商: LSI Corporation
英文描述: Highly Integrated ATM Segmentation and Reassembly (SAR) Engine optimized for internetworking applications(用于優(yōu)化網(wǎng)絡(luò)的高度集成的異步傳輸模式-分段和重組處理芯片)
中文描述: 高度集成的自動(dòng)柜員機(jī)分段和重組(SAR)的網(wǎng)絡(luò)應(yīng)用(用于優(yōu)化網(wǎng)絡(luò)的高度集成的異步傳輸模式-分段和重組處理芯片優(yōu)化引擎)
文件頁(yè)數(shù): 26/232頁(yè)
文件大小: 1389K
代理商: L64360
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1-10
Introduction
Congestion
Control
No one has seen enough ATM networks in operation to gain a real under-
standing of ATM network congestion. As the industry moves ahead with
ATM, it is reassuring to note that the ATMizer Architecture, with its user
programmable CPU positioned directly at the ATM line interface, is capa-
ble of executing or facilitating almost any congestion control algorithm
imaginable. And because user firmware is downloaded at system reset,
systemsinthefieldcanbeupdatedwithnewcongestioncontrolalgorithms
as more is learned about congestion in real ATM networks.
The ATMizer Architecture also offers fast congestion response time. Cells
arriving at the ACI with notification of network congestion can affect the
transmission of the very next cell, either inhibiting it altogether, slowing
down the rate of transmission of assigned cells, or forcing Cell Loss Prior-
ity (CLP) reductions. The user provides the algorithm. The ATMizer
Architecture provides the hardware pacing logic, aggregate traffic shaping
capability, and the processor to execute the algorithm.
AAL 1 Realtime
Data Streams
TheAPUperformstherealtimedatastreambuffer(DS1,voice,video,etc.)
transfers (limits on ATM data rates may apply). The AAL 1 Segmentation
and Reassembly (SAR) Header requires a Residual Time Stamp (RTS).
The AAL 1 segmentation routine running on the APU can access RTS val-
ues from any memory-mapped device or location and carefully interleave
the RTS value into the headers of the AAL 1 cell stream. When a new RTS
value is needed, the APU retrieves it. When sequence numbers and
sequence number protection are called for, the APU generates and inserts
the appropriate information into the SAR Header. And on reassembly, the
APU will verify sequence number integrity and sequentially and pass the
RTS value to the appropriate device.
Diagnostic
Operation
TheATMizerArchitecturecanactivelyparticipateindiagnosticoperations
by forcing CRC32 errors, gathering line statistics, and user defined opera-
tions. And under normal operating conditions, the APU can be chartered
with the additional task of statistics gathering to aid network management
process. All of these operations are made possible by the inclusion of a
user-programmable APU.
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