參數(shù)資料
型號(hào): L64360
廠商: LSI Corporation
英文描述: Highly Integrated ATM Segmentation and Reassembly (SAR) Engine optimized for internetworking applications(用于優(yōu)化網(wǎng)絡(luò)的高度集成的異步傳輸模式-分段和重組處理芯片)
中文描述: 高度集成的自動(dòng)柜員機(jī)分段和重組(SAR)的網(wǎng)絡(luò)應(yīng)用(用于優(yōu)化網(wǎng)絡(luò)的高度集成的異步傳輸模式-分段和重組處理芯片優(yōu)化引擎)
文件頁(yè)數(shù): 111/232頁(yè)
文件大小: 1389K
代理商: L64360
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CRC10 Generation and Error Checking
9-15
9.8
CRC10
Generation and
Error Checking
Since the ATMizer Architecture can mix cells of all AAL types within a
single ATM Cell stream, the APU must indicate to the ACI Transmitter
whenanAAL3/4cellistobesent.ForAAL3/4cells,theACITransmitter
calculatesaCRC10valuefortheSAR-PDUandappendsittothecell.The
APU indicates to the ACI Transmitter that CRC10 generation is required
by setting APU Address Bit 6 to one for the Store operation that writes the
address of the cell into the ACI Transmitter’s Cell Address FIFO. If the
APU clears Address Bit 6 to zero, the ACI Transmitter transmits the value
contained in the last two bytes of the Transmit Cell in the VCR 64-byte
Cell Holder location for the addressed cell.
For AAL 3/4 cells, the APU must construct the ATM Header and the SAR
Header from the cell and place them into the appropriate locations in the
VCR (cells are always bottom justified within a 64-byte Cell Holder area
in the VCR). The APU must also calculate the length of the actual
SAR-SDU inbytes andplaceitinto theLength Indication (LI)Field ofthe
AAL 3/4 trailer before the cell can be sent through the Transmitter. The
ACI Transmitter transmits the LI Field out of the ATMizer Architecture in
Bits [7:2] of Byte 47 of the SAR-PDU. The ACI Transmitter inserts the
CRC10 value that it calculates into Bits [1:0] of Byte 47 and Bits [7:0] of
Byte 48 of the SAR-PDU. (Note that Byte 47 of the SAR-PDU is located
at Byte 62 of the Cell Holder and Byte 48 of the SAR-PDU is located at
Byte 63 of the Cell Holder, the last byte of the 64-byte Cell Holder.) The
APU writes the LI Field into Byte 62 right justified. The Transmitter left
justifies the LI Field before merging it with the two most significant bits of
the CRC10 and then transmits it off chip. The Transmitter is designed to
receive the LI Field right justified in Byte 62 of the Cell Holder (Byte 47
of the SAR-PDU) so that the APU does not have to perform a shift left
instruction to left justify the value.
Note 1
If the SAR-PDU is less than 44 bytes, the APU must fill all unused loca-
tions in the Cell Holder with zeros. If no pattern is explicitly written into
the unused bytes, the previous contents (whatever is stored in these loca-
tions in the VCR) is transmitted and is included in the CRC10 calculation.
Ifitisimportanttozerooutallunusedfields,theAPUshouldusetheDMA
Controller to stream zeros in from a reserved 64-byte location in memory
containing nothing but zeros. This allows the APU to perform other tasks
while the Cell Holder is being filled by zeros. Alternatively, the APU can
write zeros to all unused bits.
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