參數(shù)資料
型號(hào)： UPD488448FB-C80-45-DQ1
廠商： NEC Corp.
英文描述： 128 M-bit Direct Rambus⑩ DRAM
中文描述： 128 M位DRAM的直接Rambus的⑩
文件頁(yè)數(shù)： 46/80頁(yè)
文件大?。?/td> 1902K
代理商： UPD488448FB-C80-45-DQ1
Data Sheet M14837EJ3V0DS00
46
μ
PD488448 for Rev. P
Figure 22-1 Control Registers (6/7)
Control Register : TCDLY1
Address : 04a
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TCDLY1
Read/write register.
Reset value is undefined.
Field
Description
Specifies the value of the t
CDLY1-C
core parameter in t
CYCLE
units. This adds a programmable delay to Q (read data)
packets, permitting round trip read to delay all devices to be equalized. This field may be written with the values “000”
(0
t
CYCLE
) through “010” (2
t
CYCLE
). Refer to TPARM Register for more details.
TCDLY1
Control Register : SKIP
Address : 04b
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
AS
MSE
MS
0
0
0
0
0
0
0
0
0
0
Read/write register (except AS field).
Reset value is zero.
Field
Description
Manual skip (MS must be 1 when MSE=1). > During initialization, the RDRAMs at the furthest point in the fifth read
domain may have selected the AS=0 value, placing them at the closest point in a sixth read domain. Setting the
MSE/MS fields to 1/1 overrides the autoskip value and returns hem to 111 he furthest point of the fifth read domain.
Manual skip enable (0=auto, 1=manual ).
MS
MSE
AS
Autoskip. Read-only value determined by autoskip circuit and stored when SETF serial command is received by
RDRAM during initialization. In Figure34-1, AS=1 corresponds to the early Q(a1) packet and AS=0 to the Q(a1) packet
one t
CYCLE
later for the four uncertain cases.
Control Register : TCYCLE
Address : 04c
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
TCYCLE13..0
Read/write register.
Reset value is undefined.
Field
Description
Specifies the value of the t
CYCLE
datasheet parameter in 64ps units. For the t
CYCLE,MIN
of 2.50 ns (2500ps), this field
should be written with the “00027
16
” (39
64ps).
TCYCLE13..0
相關(guān)PDF資料
PDF描述
UPD488448FB-C80-45-DQ2 128 M-bit Direct Rambus⑩ DRAM
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