參數(shù)資料
型號(hào): UPD488448FB-C80-45-DQ1
廠商: NEC Corp.
英文描述: 128 M-bit Direct Rambus⑩ DRAM
中文描述: 128 M位DRAM的直接Rambus的⑩
文件頁(yè)數(shù): 10/80頁(yè)
文件大?。?/td> 1902K
代理商: UPD488448FB-C80-45-DQ1
Data Sheet M14837EJ3V0DS00
10
μ
PD488448 for Rev. P
RD Command:
The RD (read) command causes one of the 64 dualocts of one of the sense amps to be transmitted
on the DQA/DQB pins of the Channel.
WR Command:
The WR (write) command causes a dualoct received from the DQA/DQB data pins of the Channel to
be loaded into the write buffer. There is also space in the write buffer for the BC bank address and C column
address information. The data in the write buffer is automatically retired (written with optional bytemask) to one of the
64 dualocts of one of the sense amps during a subsequent COP command. A retire can take place during a RD, WR,
or NOCOP to another device, or during a WR or NOCOP to the same device. The write buffer will not retire during a
RD to the same device. The write buffer reduces the delay needed for the internal DQA/DQB data path turn-around.
PREC Precharge:
The PREC, RDA and WRA commands are similar to NOCOP, RD and WR, except that a precharge
operation is scheduled at the end of the column operation. These commands provide a second mechanism for
performing precharge.
PREX Precharge:
After a RD command, or after a WR command with no byte masking (M=0), a COLX packet may
be used to specify an extended operation (XOP). The most important XOP command is PREX. This command
provides a third mechanism for performing precharge.
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