- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379500 > UPD488448FB-C80-45-DQ1 (NEC Corp.) 128 M-bit Direct Rambus⑩ DRAM PDF資料下載
參數(shù)資料
| 型號(hào)： | UPD488448FB-C80-45-DQ1 |
| 廠商： | NEC Corp. |
| 英文描述： | 128 M-bit Direct Rambus⑩ DRAM |
| 中文描述： | 128 M位DRAM的直接Rambus的⑩ |
| 文件頁數(shù)： | 31/80頁 |
| 文件大?。?/td> | 1902K |
| 代理商： | UPD488448FB-C80-45-DQ1 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁當(dāng)前第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
Data Sheet M14837EJ3V0DS00
31
μ
PD488448 for Rev. P
17. Interleaved Read - Example
Figure 17-1 shows an example of interleaved read transactions. Transactions similar to the one presented in Figure
13-1 are directed to non-adjacent banks of a single RDRAM. The address sequence is identical to the one used in
the previous write example. The DQ data pins efficiency is also 100%. The only difference with the write example
(aside from the use of the RD command rather than the WR command) is the use of the PREX command in a COLX
packet to precharge the banks rather than the RDA command. This is done because the PREX is available for a
readtransaction but is not available for a masked write transaction.
Figure 17-1 Interleaved Read Transaction with Two Dualoct Data Length
CTM/CFM
DQA7..0
DQB7..0
COL4
..COL0
ROW2
..ROW0
T
0
T
4
T
8
T
12
T
1
T
5
T
9
T
13
T
2
T
6
T
10
T
14
T
3
T
7
T
11
T
15
T
16
T
20
T
24
T
28
T
17
T
21
T
25
T
29
T
18
T
22
T
26
T
30
T
19
T
23
T
27
T
31
T
32
T
36
T
40
T
44
T
33
T
37
T
41
T
45
T
34
T
38
T
42
T
46
T
35
T
39
T
43
T
47
ACT a0
PREX b3
RD c2
RD c1
RD b1
RD b2
PREX a3
ACT b0
ACT c0
ACT d0
ACT e0
RD a1
RD a2
PREX z3
RD d1
RDd2
PREX c3
RD e1
RD e2
PREX d3
RD z1
RD z2
PREX y3
Q (b2)
Q (b1)
Q (a2)
Q (a1)
Q (c1)
Q (c2)
Q (d1)
Q (z2)
Q (z1)
Q (x2)
Q (y1)
Q (y2)
t
RCD
t
CAC
Transaction e can use the
same bank as transaction a
ACT f0
t
RC
t
RR
f3 = {Da,Ba+2}
Transaction f: RD
f0 = {Da,Ba+2,Rf}
f1 = {Da,Ba+2,Cf1}
f2= {Da,Ba+2,Cf2}
e3 = {Da,Ba}
Transaction e: RD
e0 = {Da,Ba,Re}
e1 = {Da,Ba,Ce1}
e2= {Da,Ba,Ce2}
d3 = {Da,Ba+6}
Transaction d: RD
d0 = {Da,Ba+6,Rd}
d1 = {Da,Ba+6,Cd1}
d2= {Da,Ba+6,Cd2}
c3 = {Da,Ba+4}
Transaction c: RD
c0 = {Da,Ba+4,Rc}
c1 = {Da,Ba+4,Cc1}
c2= {Da,Ba+4,Cc2}
b3 = {Da,Ba+2}
Transaction b: RD
b0 = {Da,Ba+2,Rb}
b1 = {Da,Ba+2,Cb1}
b2= {Da,Ba+2,Cb2}
a3 = {Da,Ba}
Transaction a: RD
a0 = {Da,Ba,Ra}
a1 = {Da,Ba,Ca1}
a2= {Da,Ba,Ca2}
z3 = {Da,Ba+6}
Transaction z: RD
z0 = {Da,Ba+6,Rz}
z1 = {Da,Ba+6,Cz1}
z2= {Da,Ba+6,Cz2}
y3 = {Da,Ba+4}
Transaction y: RD
y0 = {Da,Ba+4,Ry}
y1 = {Da,Ba+4,Cy1}
y2= {Da,Ba+4,Cy2}
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UPD488448FB-C80-45-DQ2 | 128 M-bit Direct Rambus⑩ DRAM |
| UPD488448FB-C71-45-DQ1 | 128 M-bit Direct Rambus⑩ DRAM |
| UPD488448FB-C71-45-DQ2 | 128 M-bit Direct Rambus⑩ DRAM |
| UPD488448FB-C60-53-DQ2 | 128 M-bit Direct Rambus⑩ DRAM |
| UPD488448FF-C80-45-DQ1 | 128 M-bit Direct Rambus⑩ DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD4990AG-A | 制造商:Renesas Electronics 功能描述:Cut Tape |
| UPD4991ACX-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD4992CX-A | 制造商:Renesas Electronics 功能描述:Cut Tape |
| UPD50256CP15 | 制造商:HIT 功能描述:50256 HITACHI'86 SMT N9F8A |
| UPD50256CP-15 | 制造商:HIT 功能描述:50256 HITACHI'86 SMT N9F8A |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。