參數(shù)資料
型號: DS3112N
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA256
封裝: 27 X 27 MM, PLASTIC, BGA-256
文件頁數(shù): 75/134頁
文件大?。?/td> 900K
代理商: DS3112N
DS3112
45 of 134
Bit 0 / One Second Timer Boundary Occurrence (OST).
0 = interrupt masked
1 = interrupt unmasked
Bit 1 / Counter Overflow Event (COVF).
0 = interrupt masked
1 = interrupt unmasked
Bit 2 / Change in BERT Status (BERT).
0 = interrupt masked
1 = interrupt unmasked
Bit 3 / Change in HDLC Status (HDLC).
0 = interrupt masked
1 = interrupt unmasked
Bit 4 / Change in FEAC Status (FEAC).
0 = interrupt masked
1 = interrupt unmasked
Bit 5 / Change in T2/E2 LOF or AIS Status (T2E2SR1).
0 = interrupt masked
1 = interrupt unmasked
Bit 6 / Change in T2/E2 RAI Status (T2E2SR2).
0 = interrupt masked
1 = interrupt unmasked
Bit 8 / T1 Loopback Detected (T1LB).
0 = interrupt masked
1 = interrupt unmasked
Bit 9 / Change in T3/E3 Framer Status (T3E3SR).
0 = interrupt masked
1 = interrupt unmasked
Bit 10 / Loss Of Transmit Clock (LOTC).
0 = interrupt masked
1 = interrupt unmasked
Bit 11 / Loss Of Receive Clock (LORC).
0 = interrupt masked
1 = interrupt unmasked
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