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參數(shù)資料
| 型號(hào)： | DS3112N |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類(lèi)： | Digital Transmission Controller |
| 英文描述： | DATACOM, FRAMER, PBGA256 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-256 |
| 文件頁(yè)數(shù)： | 47/134頁(yè) |
| 文件大?。?/td> | 900K |
| 代理商： | DS3112N |
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DS3112
2 of 134
TABLE OF CONTENTS
SECTION 1: INTRODUCTION ............................................................................................................. 4
SECTION 2: SIGNAL DESCRIPTION ............................................................................................... 11
2.1 OVERVIEW / SIGNAL LEAD LIST ............................................................................................ 11
2.2 CPU BUS SIGNAL DESCRIPTION ............................................................................................. 17
2.3 T3 / E3 RECEIVE FRAMER SIGNAL DESCRIPTION .............................................................. 19
2.4 T3 / E3 TRANSMIT FORMATTER SIGNAL DESCRIPTION ................................................... 21
2.5 LOW SPEED (T1 OR E1) RECEIVE PORT SIGNAL DESCRIPTION ...................................... 23
2.6 LOW SPEED (T1 OR E1) TRANSMIT PORT SIGNAL DESCRIPTION................................... 24
2.7 HIGH SPEED (T3 OR E3) RECEIVE PORT SIGNAL DESCRIPTION ..................................... 26
2.8 HIGH SPEED (T3 OR E3) TRANSMIT PORT SIGNAL DESCRIPTION.................................. 26
2.9 JTAG SIGNAL DESCRIPTION....................................................................................................27
2.10 SUPPLY, TEST, RESET AND MODE SIGNAL DESCRIPTION............................................. 27
SECTION 3: MEMORY MAP .............................................................................................................. 29
SECTION 4: MASTER DEVICE CONFIGURATION AND STATUS/INTERRUPT................... 31
4.1 MASTER RESET AND ID REGISTER DESCRIPTION............................................................. 31
4.2 MASTER CONFIGURATION REGISTERS DESCRIPTION..................................................... 32
4.3 MASTER STATUS AND INTERRUPT REGISTER DESCRIPTION ........................................ 37
4.4 TEST REGISTER DESCRIPTION................................................................................................ 46
SECTION 5: T3 / E3 FRAMER ............................................................................................................ 47
5.1 GENERAL DESCRIPTION........................................................................................................... 47
5.2 T3 / E3 FRAMER CONTROL REGISTER DESCRIPTION........................................................ 48
5.3 T3 / E3 FRAMER STATUS AND INTERRUPT REGISTER DESCRIPTION ........................... 53
5.4 T3 / E3 PERFORMANCE ERROR COUNTERS ......................................................................... 60
SECTION 6: M13 / E13 / G747 MULTIPLEXER AND T2 / E2 / G747 FRAMER......................... 64
6.1 GENERAL DESCRIPTION........................................................................................................... 64
6.2 T2 / E2 / G747 FRAMER CONTROL REGISTER DESCRIPTION............................................ 64
6.3 T2 / E2 / G747 FRAMER STATUS AND INTERRUPT REGISTER DESCRIPTION ............... 66
6.4 T1 / E1 AIS GENERATION CONTROL REGISTER DESCRIPTION ....................................... 70
SECTION 7: T1 / E1 LOOPBACK AND DROP AND INSERT FUNCTIONALITY .................... 73
7.1 GENERAL DESCRIPTION........................................................................................................... 73
7.2 T1 / E1 LOOPBACK CONTROL REGISTER DESCRIPTION................................................... 74
7.3 T1 LINE LOOPBACK COMMAND STATUS REGISTER DESCRIPTION.............................. 78
7.4 T1 / E1 DROP AND INSERT CONTROL REGISTER DESCRIPTION ..................................... 79
SECTION 8: BERT ................................................................................................................................ 81
8.1 GENERAL DESCRIPTION........................................................................................................... 81
8.2 BERT REGISTER DESCRIPTION ............................................................................................... 81
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3112N+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3112N+W | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3112NC1 | 制造商:Maxim Integrated Products 功能描述:T3 E3 MULTIPLEXER, 3.3V T3/E3 FRAMER AND M13/E13/G.747 MUX - Rail/Tube |
| DS3112ND1E | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| DS3112RD | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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