參數(shù)資料
型號： DS3112N
廠商： DALLAS SEMICONDUCTOR
元件分類： Digital Transmission Controller
英文描述： DATACOM, FRAMER, PBGA256
封裝： 27 X 27 MM, PLASTIC, BGA-256
文件頁數(shù)： 54/134頁
文件大?。?/td> 900K
代理商： DS3112N
DS3112
26 of 134
2.7 HIGH SPEED (T3 OR E3) RECEIVE PORT SIGNAL DESCRIPTION
Signal Name:
HRPOS / HRNEG
Signal Description:
High Speed (T3 or E3) Receive Serial Data Inputs
Signal Type:
Input
These input signals sample the serial data from the incoming T3 data streams or E3 data streams. Data
can be clocked into the device either on falling edges (normal clock mode) or rising edges (inverted clock
mode) of the associated HRCLK. This option is controlled via the HRCLKI control bit in Master Control
Register 2 (see Section 4.2).
Signal Name:
HRCLK
Signal Description:
High Speed (T3 or E3) Receive Serial Clock Input
Signal Type:
Input
This signal is used to clock data in from the incoming T3 or E3 data streams. The T3 or E3 serial data
streams at the HRPOS and HRNEG signals can be clocked into the device either on falling edges (normal
clock mode) or rising edges (inverted clock mode) of HRCLK. This option is controlled via the HRCLKI
control bit in Master Control Register 2 (see Section 4.2).
Note: The HRCLK must be present for the Host to be able to obtain status information (except the
LOTC and LORC status bits – see Section 4.3) from the device.
2.8 HIGH SPEED (T3 OR E3) TRANSMIT PORT SIGNAL DESCRIPTION
Signal Name:
HTPOS / HTNEG
Signal Description:
High Speed (T3 or E3) Transmit Serial Data Outputs
Signal Type:
Output
These output signals present the outgoing T3 data streams or E3 data streams. Data can be clocked out of
the device either on rising edges (normal clock mode) or falling edges (inverted clock mode) of HTCLK.
This option is controlled via the HTCLKI control bit in Master Control Register 2 (see Section 4.2).
Also, these outputs can be forced high or low via the HTDATH and HTDATL control bits respectively
in Master Control Register 2 (see Section 4.2).
Signal Name:
HTCLK
Signal Description:
High Speed (T3 or E3) Receive Serial Clock Output
Signal Type:
Output
This output signal is used to clock T3 or E3 data out of the device. The T3 or E3 serial data streams at
the HTPOS and HTNEG signals can be clocked out of the device either on rising edges (normal clock
mode) or falling edges (inverted clock mode) of HTCLK. This option is controlled via the HTCLKI
control bit in Master Control Register 2 (see Section 4.2).
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS3112N+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3112N+W 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3112NC1 制造商:Maxim Integrated Products 功能描述:T3 E3 MULTIPLEXER, 3.3V T3/E3 FRAMER AND M13/E13/G.747 MUX - Rail/Tube
DS3112ND1E 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述:
DS3112RD 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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