參數(shù)資料
型號(hào): DS3112N
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA256
封裝: 27 X 27 MM, PLASTIC, BGA-256
文件頁(yè)數(shù): 103/134頁(yè)
文件大?。?/td> 900K
代理商: DS3112N
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DS3112
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6.4 T1 / E1 AIS GENERATION CONTROL REGISTER DESCRIPTION
Via the T1/E1 Alarm Indication Signal (AIS) Control Registers, the Host can configure the DS3112 to
generate an unframed all ones signal in either the transmit or receive paths on the 28 T1 ports or the 16/21
E1 ports. On reset, the device will force AIS in both the transmit and receive paths and it is up to the
Host to modify the T1/E1 AIS Generation Control Registers to allow normal T1/E1 traffic to traverse the
DS3112. See the Block Diagrams in Section 1 for details on where the AIS signal is injected into the data
flow. When the M13/E13 multiplexer function is disabled in the DS3112 (see the UNCHEN control bit
in the Master Control Register 1 in Section 4.2 for details), the T1/E1 AIS Generation Control Registers
are meaningless and can be set to any value.
Register Name:
T1E1RAIS1
Register Description:
T1/E1 Receive Path AIS Generation Control Register 1
Register Address:
40h
Bit #
765
43210
Name
AIS8
AIS7
AIS6
AIS5
AIS4
AIS3
AIS2
AIS1
Default
000
00000
Bit #
151413
121110
9
8
Name
AIS16
AIS15
AIS14
AIS13
AIS12
AIS11
AIS10
AIS9
Default
000
00000
Note: Bits that are underlined are read only; all other bits are read-write.
Bits 0 to 15 / Receive AIS Generation Control for T1/E1 Ports 1 to 16 (AIS1 to AIS2). These bits
determine whether the device will replace the demultiplexed T1/E1 datastream with an unframed all ones
AIS signal. AIS1 controls the data at LRDAT1, AIS2 controls the data at LRDAT2, and so on. Since
ports 4, 8, 12, 16, 20, 24, and 28 are not active in the G747 Mode, the AIS4, AIS8, AIS12, and AIS16 bits
have no affect in the G747 Mode.
0 = send AIS to the LRDAT output
1 = send normal data to the LRDAT output
Register Name:
T1E1RAIS2
Register Description:
T1/E1 Receive Path AIS Generation Control Register 2
Register Address:
42h
Bit #
765
43210
Name
AIS24
AIS23
AIS22
AIS21
AIS20
AIS19
AIS18
AIS17
Default
000
00000
Bit #
151413
121110
9
8
Name
n/a
AIS28
AIS27
AIS26
AIS25
Default
-
0000
Note: Bits that are underlined are read only; all other bits are read-write.
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