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參數(shù)資料
| 型號： | DS3112N |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Digital Transmission Controller |
| 英文描述： | DATACOM, FRAMER, PBGA256 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-256 |
| 文件頁數(shù)： | 40/134頁 |
| 文件大?。?/td> | 900K |
| 代理商： | DS3112N |
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DS3112
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G.747 Framing Structure and E12 Multiplexing
The G.747 frame structure is made up of five 168 bit Sets. See Figure 14.4A. The five Sets are
transmitted one after another (...Set1/Set2/Set3/Set4/Set5/Set1...) to make up the complete G.747 frame
structure. The Frame Alignment Signal (FAS) is placed in the first 9 bits of Set 1. Set 2 contains the
Remote Alarm Indication (RAI) bit and a Parity Bit (PAR) as well as a reserved bit which is fixed to a
one. The PAR bit will be set to a one when there are odd number of ones from the tributaries in the
preceding frame and it will be set to a zero when there are an even number of ones. The parity
calculation does not include the FAS, RAI, reserved bit, or Justification Control Bits. The three
tributaries are bit interleaved starting with a bit from Tributary 1 immediately after the FAS in Set 1.
The first three bits of Sets 3, 4, and 5 are the Justification Control Bits. Bits 4 to 6 of Set 5 are the
Stuffing Bits. The Justification Control bits control when data will be stuffed into the Stuffing Bit
positions. When a majority of the three Justification Control Bits from a particular tributary is set to zero,
the Stuffing Bit position will be used for tributary data. When the Justification Control Bits are majority
decoded to be one, the Stuffing Bit will not be used for tributary data.
G.747 Frame Structure Figure 14.4A
Set 1
Bit 1
Bit 168
FAS (111010000)
b11
b21
b31
b12
b22
b32
b13
...bits from the tributaries...
Set 2
Bit 1
Bit 168
RAI
PAR
1
...bits from the tributaries...
Set 3
Bit 1
Bit 168
c11
c21
c31
...bits from the tributaries...
Set 4
Bit 1
Bit 168
c12
c22
c32
...bits from the tributaries...
Set 5
Bit 1
Bit 168
c13
c23
c33
s1
s2
s3
...bits from the tributaries...
NOTES:
1.
bit 1 of set 1 is transmitted first
2.
bji
tributary bits
j = tributary number
i = bit number
3.
cji
justification control bits
j = tributary number
i = control stuffing bit number
4.
sj
stuffing bits
j = tributary number
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PDF描述 |
|---|---|
| DS3112 | DATACOM, FRAMER, PBGA256 |
| DS3131 | SPECIALTY TELECOM CIRCUIT, PBGA256 |
| DS3134 | DATACOM, FRAMER, PBGA256 |
| DS3150QN | DATACOM, PCM TRANSCEIVER, PQCC28 |
| DS3150Q | DATACOM, PCM TRANSCEIVER, PQCC28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3112N+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3112N+W | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3112NC1 | 制造商:Maxim Integrated Products 功能描述:T3 E3 MULTIPLEXER, 3.3V T3/E3 FRAMER AND M13/E13/G.747 MUX - Rail/Tube |
| DS3112ND1E | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| DS3112RD | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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