參數(shù)資料
型號(hào): DS3112N
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA256
封裝: 27 X 27 MM, PLASTIC, BGA-256
文件頁數(shù): 37/134頁
文件大小: 900K
代理商: DS3112N
DS3112
131 of 134
T3 Stuff Block Structure Figure 14.2D
M1
Subframe
F4
Stuff
Bit 1
Info
Bit 2
Info
Bit 3
Info
Bit 4
Info
Bit 5
Info
Bit 6
Info
Bit 7
Info
Bit 8
......
Info
Bit 84
M2
Subframe
F4
Info
Bit 1
Stuff
Bit 2
Info
Bit 3
Info
Bit 4
Info
Bit 5
Info
Bit 6
Info
Bit 7
Info
Bit 8
......
Info
Bit 84
M3
Subframe
F4
Info
Bit 1
Info
Bit 2
Stuff
Bit 3
Info
Bit 4
Info
Bit 5
Info
Bit 6
Info
Bit 7
Info
Bit 8
......
Info
Bit 84
M4
Subframe
F4
Info
Bit 1
Info
Bit 2
Info
Bit 3
Stuff
Bit 4
Info
Bit 5
Info
Bit 6
Info
Bit 7
Info
Bit 8
......
Info
Bit 84
M5
Subframe
F4
Info
Bit 1
Info
Bit 2
Info
Bit 3
Info
Bit 4
Stuff
Bit 5
Info
Bit 6
Info
Bit 7
Info
Bit 8
......
Info
Bit 84
M6
Subframe
F4
Info
Bit 1
Info
Bit 2
Info
Bit 3
Info
Bit 4
Info
Bit 5
Stuff
Bit 6
Info
Bit 7
Info
Bit 8
......
Info
Bit 84
M7
Subframe
F4
Info
Bit 1
Info
Bit 2
Info
Bit 3
Info
Bit 4
Info
Bit 5
Info
Bit 6
Stuff
Bit 7
Info
Bit 8
......
Info
Bit 84
14.3 E13 BASICS
E13 multiplexing is the process of merging 16 E1 lines into a single E3 line. This is a two step process.
First, four of the E1 lines are merged into a single E2 rate and then four E2 rates are merged to form the
E3. The first step of this process is called a E12 function since it is merging E1 lines into E2. The second
step of this process is called a E23 function since it is merging E2 lines into a E3. The term E13 implies
that both E12 and E23 are being performed to map 16 E1 lines into the E3. These two steps are
independent and will be discussed separately.
E Carrier Rates Table 14.3A
E Carrier Level
Nominal Data Rate
E1
2.048 Mbps
E2
8.448 Mbps
E3
34.368 Mbps
E2 Framing Structure and E12 Multiplexing
The E2 frame structure is made up of four 212 bit Sets. See Figure 14.3A. The four Sets are transmitted
one after another (...Set1/Set2/Set3/Set4/Set1...) to make up the complete E2 frame structure. The Frame
Alignment Signal (FAS) is placed in the first 10 bits of Set 1 and is followed by the Remote Alarm
Indication (RAI) bit and a National Bit (Sn). The remainder of Set 1 is filled with bits from the four
tributaries. The four tributaries are bit interleaved starting with a bit from Tributary 1 immediately after
the Sn bit. The first four bits of Sets 2, 3, and 4 are the Justification Control Bits. Bits 5 to 8 of Set 4 are
the Stuffing Bits. The Justification Control bits control when data will be stuffed into the Stuffing Bit
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