參數(shù)資料
型號: DS3112N
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA256
封裝: 27 X 27 MM, PLASTIC, BGA-256
文件頁數(shù): 108/134頁
文件大?。?/td> 900K
代理商: DS3112N
DS3112
75 of 134
Register Name:
T1E1DLB1
Register Description:
T1/E1 Diagnostic Loopback Control Register 1
Register Address:
54h
Bit #
765
43210
Name
DLB8
DLB7
DLB6
DLB5
DLB4
DLB3
DLB2
DLB1
Default
000
00000
Bit #
151413
121110
9
8
Name
DLB16
DLB15
DLB14
DLB13
DLB12
DLB11
DLB10
DLB9
Default
000
00000
Note: Bits that are underlined are read only; all other bits are read-write.
Bits 0 to 15 / T1/E1 Diagnostic Loopback Enable for Ports 1 to 16 (DLB1 to DLB16). These bits
enable or disable the T1/E1 Diagnostic LoopBack (DLB). See the Block Diagrams in Section 1 for a
visual description of this loopback. DLB1 corresponds to T1/E1 Port 1, DLB2 corresponds to T1/E1 Port
2, and so on. If the device is configured in Low Speed T1/E1 Port Loop Timed mode (if LLTM bit in the
MC1 register is set to a one) then only data will be looped back - the clock will not be looped back. Since
ports 4, 8, 12, 16, 20, 24, and 28 are not active in the G747 Mode, the DLB4, DLB8, DLB12 and DLB16
bits have no affect in the G747 Mode.
0 = disable loopback
1 = enable loopback
Register Name:
T1E1DLB2
Register Description:
T1/E1 Diagnostic Loopback Control Register 2
Register Address:
56h
Bit #
765
43210
Name
DLB24
DLB23
DLB22
DLB21
DLB20
DLB19
DLB18
DLB17
Default
000
00000
Bit #
151413
121110
9
8
Name
n/a
DLB28
DLB27
DLB26
DLB25
Default
-
0000
Note: Bits that are underlined are read only; all other bits are read-write.
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參數(shù)描述
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