參數(shù)資料
型號(hào)： AD6652XBC
廠商： ANALOG DEVICES INC
元件分類： 通信及網(wǎng)絡(luò)
英文描述： SPECIALTY TELECOM CIRCUIT, PBGA256
封裝： 17 X 17 MM, MINI, BGA-256
文件頁(yè)數(shù)： 38/76頁(yè)
文件大?。?/td> 1802K
代理商： AD6652XBC
Preliminary Technical Data
AD6652
Rev. PrC | Page 43 of 76
F-TEST (BIST)
-
s
to be tested into sleep mode via the
External Address Register 0x01.
2.
Prog
ster
Coefficient MEM
Data MEM
USER-CONFIGURABLE BUILT-IN SEL
The AD6652 includes two built-in test features to test the
integrity of each channel. The first is a RAM BIST (built-in self
test) and is intended to test the integrity of the high-speed
random access memory within the AD6652. The second is
channel BIST, which is designed to test the integrity of the main
signal paths of the AD6652. The BIST functions are independ-
ent of each other and may be operated simultaneously.
RAM BIST
Use the RAM BIST to validate functionality of the on-chip
RAM. This feature provides a simple pass/fail test, which give
confidence that the channel RAM is operational. Follow these
steps to perform this test:
1.
Put the channels
ram the RAM BIST enable bit in the RCF Regi
0xA8 of the channel address registers to logic high. Wait at
least 1600 clock cycles, then perform Step 3.
3.
Read back Register 0xA8 (see Table 19). If Bit 0 is high, the
test is not yet complete. If Bit 0 is low, the test is complete
and Bits 1 and 2 indicate the condition of the internal
RAM. If Bit 1 is high, then CMEM is bad. If Bit 2 is high,
then DMEM is bad.
Table 19. BIST Register 0xA8
3-Bit Data
xx1
Test incomplete
000
PASS
010
FAIL
PASS
100
PASS
FAIL
110
FAIL
CHANNEL BIST
nabled, it is possible to use
data
the o
prop
then each
internal block may be bypassed and another test can be run to
debug the fault. The I and Q paths are tested independently.
Follow these steps to perform this test:
1.
Place the channel(s) to be programmed in sleep mode at
External Address 3:3–0. Set the appropriate bits high.
Example 3:0 = 1 places Channel 0 in sleep mode.
e
3.
4.
l
d.
ed
will
-
tors. The internal pseudorandom number
t
xternal Address Register 5, an internal negative full-
Bit 6
10.
_SYNC control register is written with the
above parameters, the selected channels become active
11.
iding external vectors, then the chip may
s.
12.
figuration. If
the values are the same, then there is a very low probability
of an error in the channel.
Note: To better visualize these instructions, see Figure 44, Sync
Control Block Diagram; Table 22, the External Memory Map;
and Table 24, the Channel Address Registers Memory Map.
The Channel BIST is a thorough test of the selected AD6652
signal path. With this test mode e
externally supplied test vectors or an internal pseudonoise (PN)
generator. An error signature register in the RCF monitors
utput data of the channel and is used to determine if the
er data exits the RCF. If errors are detected,
2.
Configure the channels to be tested as required for th
application. This may require setting the NCO parameters,
the decimation rates, scalars, and RCF coefficients.
Program the start hold-off counter, 0x83, to a value of 1 in
the channel address registers of the channels to be tested.
Program Channel Address Registers 0xA5 and 0xA6 to al
0s for the channels to be teste
5.
Enable the channel BIST located at 0xA7 by programming
Bits 19–0 to the number of RCF outputs to observe.
6.
For External Address Register 5:3–0, program the desir
SYNC CH bits to logic high to select which channels
receive a Start soft-sync signal.
7.
External Address Register 5:4 should be programmed high
to emit a one-shot soft sync pulse for the Start function.
ddress Register 5:6 to 0 to allow user
8.
Reset External A
provided test vec
generator may also be selected to generate a PN data inpu
sequence by setting Bit 7 high.
9.
For E
scale sine wave is output at the NCO frequency, when
is set to 1 and Bit 7 is cleared.
When the SOFT
with the programmed attributes.
If the user is prov
be brought out of sleep mode by one of the other method
After a sufficient amount of time, the channel BIST
Signature Registers 0xA5 and 0xA6 contain a numeric
value that can be compared to the expected value for a
known good AD6652 with the exact same con
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