參數(shù)資料
型號: 5962R0722402VYC
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQFP256
封裝: QFP-256
文件頁數(shù): 99/155頁
文件大小: 4139K
代理商: 5962R0722402VYC
48
7703D–AERO–12/09
AT697F PRELIMINARY INFORMATION
PR
ELI
MINA
R
Y
IN
FOR
M
AT
IO
N
Watchdog
The watchdog operates the same way as the timers, with the difference that it is always enabled
and upon underflow asserts the external signal WDOG. This signal can be used to generate a
system reset.
If the watchdog counter is refreshed by writing to WDG register before the counter reaches zero,
the counter restarts counting from the new value.
If the counter is not refreshed before the counter reaches zero, WDOG signal is asserted.
After reset, the watchdog is automatically enabled and starts running. The watchdog is reset to a
“all ones”. Together with the default prescaler ratio of 4, the time until first expiration of the
watchdog after reset is about 2^34 clock cycles.
Note:
A read access gives the decounting value of the watchdog, the reload value itself is not stored in
the processor.
Figure 32. Watchdog Block Diagram
Control Logic
Watchdog Reg.
=0xFFFFFFFF
clock
WDG
Dat
a
Bus
WDOG
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