參數(shù)資料
型號: 5962R0722402VYC
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQFP256
封裝: QFP-256
文件頁數(shù): 148/155頁
文件大小: 4139K
代理商: 5962R0722402VYC
92
7703D–AERO–12/09
AT697F PRELIMINARY INFORMATION
PR
ELI
MINA
R
Y
IN
FOR
M
AT
IO
N
System Registers
Table 54. Product Configuration Register - PCR
Address = 0x80000024
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
res
e
rv
ed
dsu
sd
rc
trl
wtpnb[2:0]
im
ac
nwindows[4:0]
icsz[2:0]
ilsz[2:0]
dcsz[2:0]
dlsz[1:0]
divinst
muli
n
s
t
res
e
rv
ed
mems
ta
t
fpu[1:0]
pci[1:0] wprt[1:0]
r/w
r
r/w
r
x
1
100
0
00111
100
11
100
11
1
x
1
01
Bit Number
Mnemonic
Description
30
dsu
Debug Support Unit present
“0” = disabled
“1” = present
29
sdrctrl
SDRAM controller present
“0” = disabled
“1” = present
28..26
wtpnt[2:0]
Number of implemented watchpoints (0 - 4)
25
imac
UMAC/SMAC instruction implemented
24..20
nwindows[4:0]
Number of register windows.
The implemented number of SPARC register windows - 1
19..17
icsz[2:0]
Instruction cache size.
The size (in Kbytes) of the instruction cache.
Cache size = 2^(icsz).
16..15
ilsz[2:0]
Instruction cache line size.
The line size (in 32-bit words) of each line.
Line size = 2^(ilsz).
14..12
dcsz[2:0]
Data cache size.
The size (in kbytes) of the data cache.
Cache size = 2^(dcsz).
11..10
dlsz[1:0]
Data cache line size.
The line size (in 32-bit words) of each line.
Line size = 2^(dlsz).
9
divinst
UDIV/SDIV instruction implemented
8
mulinst
UMUL/SMUL instruction implemented
6
memstat
Memory status and failing address register present
5..4
fpu[1:0]
FPU type
3..2
pci[1:0]
PCI core type
1..0
wprt[1:0]
Write protection type
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