參數(shù)資料
型號: 5962R0722402VYC
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQFP256
封裝: QFP-256
文件頁數(shù): 22/155頁
文件大?。?/td> 4139K
代理商: 5962R0722402VYC
Bit Number
Mnemonic
Description
12
sys
Value of the SYSEN* pin
0 : Host mode
1 : Satellite mode
11..8
dmas[3:0]
DMA state
7
act
PCI core active
1 = active
0 = inactive
6
ff
If set 1, the transmitter fifo is full
5
xfe
If set 1, the transmitter fifo is empty
4
rfe
If set 1, the receiver fifo is empty
3..0
ss[3:0]
Slave status
Table 104. PCI Initiator Configuration - PCIIC
Address = 0x80000158
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
commsb[1:0]
reserved
mod
r/w
0x0000 00
01
00000
0
Bit Number
Mnemonic
Description
7.6
commsb[1:0]
Specifies the two most significant bits of the command used by AHB slave interface.
‘00’ = IO write
‘01’ = memory read/write
‘10’ = configuration read/write
‘11’ = mem-read-line/write-invalidate
0
mod
PCI command source mode
‘1’ = AHB slave - DMA mode
‘0’ = APB mode
Table 105. PCI Target Page Address Register - PCITPA
Address = 0x8000015C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
tpa1[7:0]
reserved
tpa2[7:0]
reserved
r/w
0x40
0x00
0x90
0x00
Bit Number
Mnemonic
Description
31..24
tpa1[7:0]
Target page address
defines the 8 most significant bits of the 16 MByte memory page on which PCI addresses are mapped
15..8
tpa2[7:0]
Target page address
defines the 8 most significant bits for the second memory BAR.
118
7703D–AERO–12/09
AT697F PRELIMINARY INFORMATION
PR
ELI
MINA
R
Y
IN
FOR
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AT
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