參數(shù)資料
型號： 5962R0722402VYC
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQFP256
封裝： QFP-256
文件頁數(shù)： 34/155頁
文件大?。?/td> 4139K
代理商： 5962R0722402VYC
AT697F PRELIMINARY INFORMATION
129
7703D–AERO–12/09
PR
ELI
MINA
R
Y
IN
FOR
M
AT
IO
N
Power “On/Off”
Sequence
The AT697F is based on the Atmel 0.18 m CMOS process ATC18RHA. Due to the use of Cold-
sparing buffers it is mandatory to follow the power “on/off” sequence define below:
At power on, first power up the VCC 3.3v buffer, and then power up the VDD 1.8v core.
At power off, first power down the VDD 1.8v core, and then power down the VCC 3.3v buffer.
It is also recommended to stop all activity during these phases as I/O could be in an undeter-
mined state (Input or Output) and create bus contention.
Power
Consumption
The power dissipation is the sum of three basic contributions : P = Pcore + Pio + Ppci
Pcore represents the contribute due to the internal activity.
Pio represents the contribute due to the IO pads and output load current, except the PCI
bus.
Ppci represents the contribute due to the PCI pads and output load current.
The following table gives the estimated current consumption for different conditions. The values
are coming from estimation and calculation and not from real measurement.
Table 125.
Mode
Typical conditions
Worst Conditions
P Core
(1.8V) in W
P I/O
(3.3V) in W
P PCI
(3.3V) in W
P Core
(1.8V) in W
P I/O
(3.3V) in W
P PCI
(3.3V) in W
Operating
(100MHz)
0.5
0.2
0.1
0.7
0.3
0.2
Power Dissipation
Typical conditions : 25°C, 1.8V core, 3.3V I/O, High I/O and core activity
Worst conditions : 125°C, 1.95 V core, 3.6V I/O; High I/O and core activity
In idle mode (100 MHz external clock), the core power consumption is 0.5W in typical conditions
and 0.7W in worst case conditions.
Decoupling
capacitance
Two main frequencies are involved in the AT697 processor environment :
33MHz from the PCI interface
100MHz from the master clock of the processor (either from PLL or directly from resonator
input)
The following hypothesis is taken for the calculation of the decoupling capacitance :
1.5nH is issued from the connection of the capacitor to the PCB
1.5nH is issued from the capacitor intrinsic inductance
Figure 50. Capacitor description
capacitor
0.75nH
1.5nH
PCB
VOH PCI
High Level Output Voltage
for PCI buffers
0.9 VCC
V
VCC = VCC(min)
IOH = 0.5mA
ICCSb
Standby Current
5
mA
VCC = VCC(max)
no clock active
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
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