參數(shù)資料
型號： 5962R0722402VYC
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQFP256
封裝： QFP-256
文件頁數(shù)： 5/155頁
文件大?。?/td> 4139K
代理商： 5962R0722402VYC
Table 73. UART 2 Status Register - UAS2
Address 0x80000084
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
fe2
pe2
ov2
br
2
th2
ts2
dr
2
r/w
xxxx xxxx xxxx xxxx xxxx xxxx x
0
1
0
Bit Number
Mnemonic
Description
6
fe2
Framing error
Indicates that a framing error was detected.
5
pe2
Parity error
indicates that a parity error was detected.
4
ov2
Overrun
Indicates that one or more character have been lost due to overrun.
3
br2
Break received
Indicates that a BREAK has been received.
2
th2
Transmitter hold register empty
Indicates that the transmitter hold register is empty.
1
ts2
Transmitter shift register empty
Indicates that the transmitter shift register is empty.
0
dr2
Data ready
Indicates that new data is available in the receiver holding register.
Table 74. UART 2 Control Register - UAC2
Address = 0x80000088
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
ec2
lb2
fl2
pe2
ps
2
ti2
ri
2
te2
re2
r/w
xxxx xxxx xxxx xxxx xxxx xxx
0
x
0
x
0
102
7703D–AERO–12/09
AT697F PRELIMINARY INFORMATION
PR
ELI
MINA
R
Y
IN
FOR
M
AT
IO
N
Bit Number
Mnemonic
Description
8
ec2
External Clock
if set, the UART scaler will be clocked by PIO[3]
7
lb2
Loop back
If set, loop back mode will be enabled.
6
fl2
Flow control
If set, enables flow control using CTS/RTS.
5
pe2
Parity enable
If set, enables parity generation and checking.
4
ps2
Parity select
Selects parity polarity
“0” = even parity
“1” = odd parity
3
ti2
Transmitter interrupt enable
If set, enables generation of transmitter interrupt.
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