參數(shù)資料
型號: 5962R0722402VYC
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQFP256
封裝: QFP-256
文件頁數(shù): 102/155頁
文件大?。?/td> 4139K
代理商: 5962R0722402VYC
50
7703D–AERO–12/09
AT697F PRELIMINARY INFORMATION
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MINA
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IN
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configuring the pin
The upper 16 bits of the general purpose interface can only be configured as outputs or inputs
on byte basis. D[15:8] is referenced as the medium byte when D[7:0] is referenced as the lower
byte.
Each byte from D[15:0] consists of two register fields. As shown in the “Register Description”
section, the direction fields are accessed at IODIR address when data fields at IODAT address.
The IODIR MEDDIR bit and the IODIR LOWDIR bit select the direction for respectively the
medium byte ( D[15:8] ) and the lower byte ( D[7:0] ). If MEDDIR (or LOWDIR) is written logic
one, the corresponding byte in D[15:0] is configured as output. If written logic zero, the byte is
configured as an input.
When configured as an input, a read of the IODAT MEDDAT fileds returns the current value of
D[15:8]. When configured as an output, the logical value from IODAT MEDDAT field is trans-
lated in physical values on D[15:8] bus.
When configured as an input, a read of the IODAT LOWDAT fileds returns the current value of
D[7:0]. When configured as an output, the logical value from IODAT LOWDAT field is trans-
lated in physical values on D[7:0] bus.
switching between input
& output
When the medium byte (or the lower) is switched from input to output by switching MEDDIR (or
LOWDIR), the value of MEDDAT (or LOWDAT) is immediatly driven on the corresponding pin.
When switched from output to input by toggling MEDDIR (or LOWDIR), the value from the pins
are immediatly written to MEDDAT (or LOWDAT).
GPI Alternate
functions
Most GPI pins have alternate functions in addition to being general I/O. Facilities like serial com-
munication link, interrupt input and configuration are made available through these functions.
The following table summaryses the assignement of the alternate functions.
Table 19.
GPI port pin
Alternate function
PIO[15]
TXD1 - UART1 transmitter data
PIO[14]
RXD1 - UART1 receiver data
PIO[13]
RTS1 - UART1 request-to-send
PIO[12]
CTS1 - UART1 clear-to-send
PIO[11]
TXD2 - UART2 transmitter data
PIO[10]
RXD2 - UART2 receiver data
PIO[9]
RTS2 - UART2 request-to-send
PIO[8]
CTS2 - UART2 clear-to-send
PIO[3]
UART clock - Use as alternative UART clock
PIO[2]
EDAC enable - Enable EDAC checking at reset
PIO[1:0]
Prom width - Defines PROM bus width at reset
GPI alternate functions
In addition to these alternate functions, each GPI interface pin can be configured as an interrupt
input to catch interrupt from external devices. Up to four interrupts can be configured on the GPI
interface by programming the I/O interrupt register (IOIT).
For a detailed description of the external interrupt configuration, please refer to the “Traps and
Interrupts” section.
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