參數(shù)資料
型號： 5962R0722402VYC
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQFP256
封裝： QFP-256
文件頁數(shù)： 11/155頁
文件大?。?/td> 4139K
代理商： 5962R0722402VYC
Bit Number
Mnemonic
Description
31
en3
Enable.
If set, the corresponding interrupt will be enabled, otherwise it will be masked.
30
le3
Level/edge triggered.
If set, the interrupt will be edge-triggered, otherwise level sensitive.
29
pl3
Polarity
If set, the corresponding interrupt will be active high (or edge-triggered on positive edge). Otherwise, it will be
active low (or edge-triggered on negative edge).
28..24
isel3[4:0]
I/O port select.
The value of this field defines which I/O port (0 - 31) should generate parallel I/O port interrupt 3.
23
en2
Enable.
If set, the corresponding interrupt will be enabled, otherwise it will be masked.
22
le2
Level/edge triggered.
If set, the interrupt will be edge-triggered, otherwise level sensitive.
21
pl2
Polarity
If set, the corresponding interrupt will be active high (or edge-triggered on positive edge). Otherwise, it will be
active low (or edge-triggered on negative edge).
20..16
isel2[4:0]
I/O port select.
The value of this field defines which I/O port (0 - 31) should generate parallel I/O port interrupt 2.
15
en1
Enable.
If set, the corresponding interrupt will be enabled, otherwise it will be masked.
14
le1
Level/edge triggered.
If set, the interrupt will be edge-triggered, otherwise level sensitive.
13
pl1
Polarity
If set, the corresponding interrupt will be active high (or edge-triggered on positive edge). Otherwise, it will be
active low (or edge-triggered on negative edge).
12..8
isel1[4:0]
I/O port select.
The value of this field defines which I/O port (0 - 31) should generate parallel I/O port interrupt 1.
7
en0
Enable.
If set, the corresponding interrupt will be enabled, otherwise it will be masked.
6
le0
Level/edge triggered.
If set, the interrupt will be edge-triggered, otherwise level sensitive.
5
pl0
Polarity
If set, the corresponding interrupt will be active high (or edge-triggered on positive edge). Otherwise, it will be
active low (or edge-triggered on negative edge).
4..0
isel0[4:0]
I/O port select.
The value of this field defines which I/O port (0 - 31) should generate parallel I/O port interrupt 0.
Table 87. I/O Port Interrupt Register - IOIT2
Address = 0x800000AC
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
en7
le7
pl7
isel7[4:0]
en6
le6
pl6
isel6[4:0]
en5
le5
pl5
isel5[4:0]
en4
le4
pl4
isel4[4:0]
r/w r/w r/w
r/w
r/w r/w r/w
r/w
r/w r/w r/w
r/w
r/w r/w r/w
r/w
0
x
x xxxx
0
x
x xxxx
0
x
x xxxx
0
x
x xxxx
108
7703D–AERO–12/09
AT697F PRELIMINARY INFORMATION
PR
ELI
MINA
R
Y
IN
FOR
M
AT
IO
N
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