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參數(shù)資料
| 型號(hào)： | MC68HC05PD6 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, TQFP-80 |
| 文件頁數(shù)： | 34/165頁 |
| 文件大?。?/td> | 841K |
| 代理商： | MC68HC05PD6 |
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July 7, 1997
GENERAL RELEASE SPECIFICATION
MC68HC05PD6
P-DECODER
MOTOROLA
REV 1.1
12-13
ERRF – Error Flag
In most situation, when ERRF= 0, it indicates that there is 2 or less than 2 bits
error in the received message codeword and correction has been done. But in
some cases, ERRF= 0 even there is more than 2 bits error.
When ERRF= 1, it indicates that there is more than 2 bits error in the received
message codeword and the data in the Received Message Information
Registers are invalid. The P-Decoder will then stop receiving the codewords
following this error codeword.
SCF – Synchronization Code Detection Flag
When the P-Decoder cannot detect the synchronization code, SCF is cleared.
Otherwise, SCF is set.
DCF – Data Received Complete Flag
This ag is set when all the data is completely received. After serving this
interrupt, it is the user’s responsibility to clear this bit, otherwise the CPU will
keep on serving this interrupt.
DBF – Data Receiving Begin Flag
This ag is set when the P-Decoder begins to receive data into the address and
message registers. After serving this interrupt, it is the user’s responsibility to
clear this bit, otherwise the CPU will keep on serving this interrupt.
MSGF – Message Received Flag
This ag is set when 20 bits of message has been stored in the Received
Message Information Registers. After serving this interrupt, it is the user’s
responsibility to clear this bit, otherwise the CPU will keep on serving this
interrupt.
ADRF
This ag is set when 3 bits of address and 2 function bits have been stored in
the Received Address Information Register. After serving this interrupt, it is the
user’s responsibility to clear this bit, otherwise the CPU will keep on serving this
interrupt.
12.4.5 User Address Registers
There are six user addresses and two self-frames for receiving public services.
Each of these six addresses has 18 bits and 1 frame selection bit to select
whether FA or FB in PDCR1 are used. The six user addresses are A0-A17,
B0-B17, C0-C17, D0-D17, E0-E17 and F0-F17 respectively from $14-$25.
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